Cypress CY8C24223A, CY8C24423A AC Electrical Characteristics, AC Chip-Level Specifications, DC24M

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CY8C24223A, CY8C24423A

AC Electrical Characteristics

AC Chip-Level Specifications

The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.

Table 20. AC Chip-Level Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

FIMO24

Internal Main Oscillator Frequency for 24 MHz

22.95

24

24.96

MHz

Trimmed. Using factory trim

 

 

 

 

 

 

values.

FCPU1

CPU Frequency (5V Nominal)

0.09

12

12.48

MHz

 

F48M

Digital PSoC Block Frequency

MHz

Not allowed.

F24M

Digital PSoC Block Frequency

0

24

24.96a

MHz

 

F32K1

Internal Low Speed Oscillator Frequency

15

32

64

kHz

 

F32K2

External Crystal Oscillator

32.768

kHz

Accuracy is capacitor and

 

 

 

 

 

 

crystal dependent. 50% duty

 

 

 

 

 

 

cycle.

FPLL

PLL Frequency

23.986

MHz

A multiple (x732) of crystal

 

 

 

 

 

 

frequency.

Jitter24M2

24 MHz Period Jitter (PLL)

800

ps

 

TPLLSLEW

PLL Lock Time

0.5

10

ms

 

TPLLSLEWSLOW

PLL Lock Time for Low Gain Setting

0.5

50

ms

 

TOS

External Crystal Oscillator Startup to 1%

1700

2620

ms

 

TOSACC

External Crystal Oscillator Startup to 100 ppm

2800

3800

ms

 

Jitter32k

32 kHz Period Jitter

100

 

ns

 

TXRST

External Reset Pulse Width

10

μs

 

DC24M

24 MHz Duty Cycle

40

50

60

%

 

Step24M

24 MHz Trim Step Size

50

kHz

 

Jitter24M1P

24 MHz Period Jitter (IMO) Peak-to-Peak

300

 

ps

 

Jitter24M1R

24 MHz Period Jitter (IMO) Root Mean

600

ps

 

 

Squared

 

 

 

 

 

FMAX

Maximum frequency of signal on row input or

12.48

MHz

 

 

row output.

 

 

 

 

 

TRAMP

Supply Ramp Time

0

μs

 

a. See the individual user module data sheets for information on maximum frequencies for user modules.

Document Number: 3-12029 Rev. *E

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Contents Features Logic Block DiagramCypress Semiconductor Corporation 198 Champion Court PSoC Functional Overview PSoC CoreDigital System Analog System Analog System Block DiagramPSoC Device Characteristics PSoC Device CharacteristicsGetting Started Additional System ResourcesPSoC Designer Software Subsystems Development ToolsDevice Editor Design BrowserDesigning with User Modules Hardware ToolsApplication Editor Acronyms Used Document ConventionsUnits of Measure Numeric NamingPinouts Pin Part PinoutPin Part Pinout Ssop Type Description Digital Analog Name Pin Part Pinout Ssop Type Description Digi- Ana Name Active high external reset with internal pullRegister Conventions Register ReferenceRegister Mapping Tables Abbreviations UsedRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr 1,Hex Access Register Map Bank 1 Table Configuration SpaceCY8C24223A, CY8C24423A Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Symbol Description Min Typ Units Operating TemperatureOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC General Purpose IO Specifications DC Electrical CharacteristicsDC Chip-Level Specifications DC Gpio Specifications Symbol Description Min Typ Max UnitsPsrroa DC Operational Amplifier SpecificationsDC Low Power Comparator Specifications DC Analog Output Buffer SpecificationsPsrrob DC Analog Reference Specifications CT Block Power = High RefHi = Vdd/2 + BandGapRef Control Power = High DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsDC24M Enable Gain32K Select AC Gpio Specifications Symbol Description Min Typ Max Units AC General Purpose IO SpecificationsAC Operational Amplifier Specifications BwoaTypical Agnd Noise with P24 Bypass AC Low Power Comparator SpecificationsCrcprs AC Digital Block SpecificationsSpim SpisAC External Clock Specifications AC Analog Output Buffer SpecificationsAC Programming Specifications BwobAC I2C Specifications SDASCL Pin 210-Mil Ssop Packaging InformationSolder Reflow Peak Temperature Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Code Definitions Ordering InformationWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationDocument History Orig. Submission Description of Change Date