Cypress CY8C24423A, CY8C24223A manual Pinouts, Pin Part Pinout

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CY8C24223A, CY8C24423A

Pinouts

The CY8C24x23A automotive PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, and XRES are not capable of Digital IO.

20-Pin Part Pinout

Table 3. 20-Pin Part Pinout (SSOP)

Pin

Type

Pin

Description

No.

Digital Analog

Name

 

Figure 5. CY8C24223A 20-Pin PSoC Device

1

IO

I

P0[7]

Analog column mux input

2

IO

IO

P0[5]

Analog column mux input and column

 

 

 

 

output

3

IO

IO

P0[3]

Analog column mux input and column

 

 

 

 

output

4

IO

I

P0[1]

Analog column mux input

5

Power

 

Vss

Ground connection

6

IO

 

P1[7]

I2C Serial Clock (SCL)

7

IO

 

P1[5]

I2C Serial Data (SDA)

8

IO

 

P1[3]

 

9

IO

 

P1[1]

Crystal Input (XTALin), I2C Serial Clock

 

 

 

 

(SCL), ISSP-SCLK*

10

Power

 

Vss

Ground connection

11

IO

 

P1[0] Crystal Output (XTALout), I2C Serial Data

 

 

 

 

(SDA), ISSP-SDATA*

12

IO

 

P1[2]

 

13

IO

 

P1[4]

Optional External Clock Input (EXTCLK)

14

IO

 

P1[6]

 

15

Input

 

XRES

Active high external reset with internal pull

 

 

 

 

down

16

IO

I

P0[0]

Analog column mux input

17

IO

I

P0[2]

Analog column mux input

18

IO

I

P0[4]

Analog column mux input

19

IO

I

P0[6]

Analog column mux input

20

Power

 

Vdd

Supply voltage

LEGEND: A = Analog, I = Input, and O = Output.

* These are the ISSP pins, which are not High Z at POR (Power On Reset).

See the PSoC Programmable System-on-Chip Technical Reference Manual for details.

A, I,P0[7]

A,IO, P0[5]

A,IO, P0[3]

A,I, P0[1] Vss I2CSCL,P1[7] I2C SDA,P1[5] P1[3]

I2CSCL,XTALin,P1[1] Vss

1

 

20

 

 

 

2

 

19

 

 

 

3

 

18

 

 

 

4

 

17

 

 

 

5

SSOP

16

 

 

6

 

15

 

7

 

14

 

 

 

8

 

13

 

 

 

9

 

12

 

 

 

10

 

11

 

 

 

 

 

 

 

Vdd P0[6], A,I

P0[4], A,I

P0[2], A,I

P0[0], A,I XRES P1[6] P1[4],EXTCLK P1[2] P1[0],XTALout,I2CSDA

Document Number: 3-12029 Rev. *E

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemPSoC Device Characteristics PSoC Device CharacteristicsGetting Started Additional System ResourcesDevelopment Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserApplication Editor Designing with User ModulesHardware Tools Document Conventions Acronyms UsedUnits of Measure Numeric NamingPin Part Pinout Ssop Type Description Digital Analog Name PinoutsPin Part Pinout Active high external reset with internal pull Pin Part Pinout Ssop Type Description Digi- Ana NameRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24223A, CY8C24423A Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC General Purpose IO SpecificationsDC Chip-Level Specifications DC Gpio Specifications Symbol Description Min Typ Max UnitsDC Operational Amplifier Specifications PsrroaPsrrob DC Low Power Comparator SpecificationsDC Analog Output Buffer Specifications Ref Control Power = High DC Analog Reference SpecificationsCT Block Power = High RefHi = Vdd/2 + BandGap DC Programming Specifications DC Analog PSoC Block SpecificationsDC POR and LVD Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications 32K Select EnableGain AC General Purpose IO Specifications AC Gpio Specifications Symbol Description Min Typ Max UnitsAC Operational Amplifier Specifications BwoaAC Low Power Comparator Specifications Typical Agnd Noise with P24 BypassAC Digital Block Specifications CrcprsSpim SpisAC Analog Output Buffer Specifications AC External Clock SpecificationsAC Programming Specifications BwobSCL AC I2C SpecificationsSDA Packaging Information Pin 210-Mil SsopCapacitance on Crystal Pins Solder Reflow Peak TemperatureTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Information Ordering Code DefinitionsSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date