Cypress CY62167EV18 manual Ball Vfbga 6 x 8 x 1 mm

Page 11

CY62167EV18 MoBL®

Package Diagram

Figure 11. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150

TOP VIEW

BOTTOM VIEW

A1 CORNER

0.25 C

 

 

 

 

 

A

 

 

 

 

 

B

 

 

8.00±0.10

 

 

 

C

 

 

 

D

 

 

 

 

 

 

 

 

 

 

E

 

 

 

 

 

F

 

 

 

 

 

G

 

 

 

 

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

 

 

 

0.55 MAX.

A1 CORNER

1 2 3 4 5 6

6.00±0.10

0.21±0.05

SEATING PLANE

0.10 C

8.00±0.10

A

 

Ø0.05 M C

 

 

 

 

 

Ø0.25 M C A B

 

 

 

 

Ø0.30±0.05(48X)

 

 

 

 

6

5

4

3

2

1

 

 

 

 

 

 

A

 

 

 

 

 

 

B

 

0.75

 

 

 

 

C

5.25

 

 

 

 

D

 

 

 

 

E

 

 

 

 

 

 

 

2.625

 

 

 

 

F

 

 

 

 

 

G

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

1.875

 

 

 

 

 

 

 

0.75

 

 

 

 

 

 

3.75

 

 

 

B

6.00±0.10

 

 

 

0.15(4X)

 

 

 

 

 

0.26 MAX.

C

1.00 MAX

51-85150-*D

Document #: 38-05447 Rev. *G

Page 11 of 13

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionBLE BHE Pin ConfigurationProduct Portfolio Min Typ Max CY62167EV18LL CY62167EV30LLCapacitance Electrical CharacteristicsMaximum Ratings Operating RangeVfbga Data Retention CharacteristicsThermal Resistance Parameter Description 55 ns Unit Min Max Read Cycle Switching Waveforms Data I/O Valid Data Shows WE controlled write cycle waveforms.17, 21Shows CE1 or CE2 controlled write cycle waveforms.17, 21 CE1 CE2 BHE BLE Inputs/Outputs Mode PowerTruth Table Ordering Information Package DiagramBall Vfbga 6 x 8 x 1 mm Orig. Submission Change Date Description of Change Document HistoryREV ECN no USB Sales, Solutions, and Legal Information