Cypress CY62167EV18 manual Document History, REV ECN no

Page 12

CY62167EV18 MoBL®

Document History Page

Document Title: CY62167EV18 MoBL® 16 Mbit (1M x 16) Static RAM

Document Number: 38-05447

REV.

ECN NO.

Orig. of

Submission

 

Change

date

Description of Change

 

 

 

 

 

 

 

**

202600

AJU

01/23/2004

New Data Sheet

 

 

 

 

 

*A

463674

NXR

See ECN

Converted from Advance Information to Preliminary

 

 

 

 

Changed VCC(max) from 2.20V to 2.25V

 

 

 

 

Removed ‘L’ bin and 35 ns speed bin from product offering

 

 

 

 

Changed ball E3 from DNU to NC

 

 

 

 

Removed redundant foot note on DNU

 

 

 

 

Changed the ISB2(typ) value from 1.3 μA to 1.5 μA

 

 

 

 

Changed the ICC(max) value from 40 mA to 25 mA

 

 

 

 

Changed the AC Test Load Capacitance value from 50 pF to 30 pF

 

 

 

 

Corrected typo in Data Retention Characteristics (tR) from 100 µs to tRC ns

 

 

 

 

Changed the ICCDR Value from 8 μA to 5 μA

 

 

 

 

Changed tOHA, tLZCE, tLZBE, and tLZWE from 6 ns to 10 ns

 

 

 

 

Changed tLZOE from 3 ns to 5 ns

 

 

 

 

Changed tHZOE, tHZCE, tHZBE, and tHZWE from 15 ns to 18 ns

 

 

 

 

Changed tSCE, tAW, and tBW from 40 ns to 35 ns

 

 

 

 

Changed tPE from 30 ns to 35 ns

 

 

 

 

Changed tSD from 20 ns to 25 ns

 

 

 

 

Updated 48 ball FBGA Package Information

 

 

 

 

Updated the Ordering Information table

*B

469182

NSI

See ECN

Minor Change: Moved to external web

 

 

 

 

 

*C

619122

NXR

See ECN

Replaced 45 ns speed bin with 55 ns speed bin

 

 

 

 

 

*D

1130323

VKN

See ECN

Converted from preliminary to final

 

 

 

 

Added footnote# 8 related ISB2 and ICCDR

 

 

 

 

Changed ISB1 and ISB2 spec from 10 μA to 12 μA

 

 

 

 

Changed ICCDR spec from 8 μA to 10 μA

 

 

 

 

Added footnote# 13 related AC timing parameters

 

 

 

 

Changed tWC spec from 45 ns to 55 ns

 

 

 

 

Changed tSCE, tAW, tPWE, tBW spec from 35 ns to 40 ns

 

 

 

 

Changed tHZWE spec from 18 ns to 20 ns

*E

1388287

VKN

See ECN

Added 48-Ball VFBGA (6 x 7 x 1mm) package

 

 

 

 

Added footnote# 1 related to FBGA package

 

 

 

 

Updated Ordering Information table

*F

1664843

VKN/AESA

See ECN

Added CY62167EV30LL-45BVI part in the Ordering Information table

 

 

 

 

Added footnote# 5 related to CY62167EV30LL-45BVI part

*G

2675375

VKN/PYRS

03/17/2009

Added CY62167EV18LL-55BVI part in the Ordering Information table

 

 

 

 

 

Document #: 38-05447 Rev. *G

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Contents Features Logic Block DiagramFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Configuration Product PortfolioMin Typ Max CY62167EV18LL CY62167EV30LL BLE BHEElectrical Characteristics Maximum RatingsOperating Range CapacitanceData Retention Characteristics Thermal ResistanceVfbga Parameter Description 55 ns Unit Min Max Read Cycle Switching Waveforms Shows WE controlled write cycle waveforms.17, 21 Data I/O Valid DataShows CE1 or CE2 controlled write cycle waveforms.17, 21 Inputs/Outputs Mode Power Truth TableCE1 CE2 BHE BLE Package Diagram Ordering InformationBall Vfbga 6 x 8 x 1 mm Document History REV ECN noOrig. Submission Change Date Description of Change Sales, Solutions, and Legal Information USB