Cypress CY62147DV30 manual Ordering Information, Bhe Ble, Inputs/Outputs Mode Power

Page 9

Truth Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY62147DV30

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

WE

 

 

OE

 

 

 

BHE

 

 

BLE

 

Inputs/Outputs

Mode

 

Power

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

X

 

 

X

 

 

 

X

 

 

X

 

High Z

Deselect/Power-Down

 

Standby (ISB)

 

 

X

 

 

X

 

 

X

 

 

 

H

 

 

H

 

High Z

Deselect/Power-Down

 

Standby (ISB)

 

 

L

 

 

H

 

 

L

 

 

 

L

 

 

L

 

Data Out (I/OO–I/O15)

Read

 

Active (ICC)

 

 

L

 

 

H

 

 

L

 

 

 

H

 

 

L

 

Data Out (I/OO–I/O7);

Read

 

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O8–I/O15in High Z

 

 

 

 

 

L

 

 

H

 

 

L

 

 

 

L

 

 

H

 

Data Out (I/O8–I/O15);

Read

 

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O0–I/O7in High Z

 

 

 

 

 

L

 

 

H

 

 

H

 

 

 

L

 

 

L

 

High Z

Output Disabled

 

Active (ICC)

 

 

L

 

 

H

 

 

H

 

 

 

H

 

 

L

 

High Z

Output Disabled

 

Active (ICC)

 

 

L

 

 

H

 

 

H

 

 

 

L

 

 

H

 

High Z

Output Disabled

 

Active (ICC)

 

 

L

 

 

L

 

 

X

 

 

 

L

 

 

L

 

Data In (I/OO–I/O15)

Write

 

Active (ICC)

 

 

L

 

 

L

 

 

X

 

 

 

H

 

 

L

 

Data In (I/OO–I/O7);

Write

 

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O8–I/O15in High Z

 

 

 

 

 

L

 

 

L

 

 

X

 

 

 

L

 

 

H

 

Data In (I/O8–I/O15);

Write

 

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O0–I/O7in High Z

 

 

 

 

Ordering Information

Speed

Ordering Code

Package

Package Type

Operating

(ns)

Diagram

Range

 

 

 

 

 

45

CY62147DV30LL-45BVXI

51-85150

48-ball (6 mm × 8mm × 1 mm) VFBGA (Pb-free)

Industrial

 

 

 

 

 

 

CY62147DV30LL-45ZSXI

51-85087

44-pin TSOP II (Pb-free)

 

 

 

 

 

 

55

CY62147DV30LL-55BVI

51-85150

48-ball (6 mm × 8mm × 1 mm) VFBGA

Industrial

 

 

 

 

 

 

CY62147DV30LL-55BVXI

 

48-ball (6 mm × 8mm × 1 mm) VFBGA (Pb-free)

 

 

 

 

 

 

 

CY62147DV30LL-55ZSXI

51-85087

44-pin TSOP II (Pb-free)

 

 

 

 

 

 

 

CY62147DV30L-55BVXE

51-85150

48-ball (6 mm × 8mm × 1 mm) VFBGA (Pb-free)

Automotive-E

 

 

 

 

 

 

CY62147DV30L-55ZSXE

51-85087

44-pin TSOP II (Pb-free)

 

 

 

 

 

 

70

CY62147DV30LL-70BVI

51-85150

48-ball (6 mm × 8mm × 1 mm) VFBGA

Industrial

 

 

 

 

 

 

CY62147DV30LL-70BVXA

 

48-ball (6 mm × 8mm × 1 mm) VFBGA (Pb-free)

Automotive-A

 

 

 

 

 

Document #: 38-05340 Rev. *F

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Contents Logic Block Diagram FeaturesFunctional Description1 Cypress Semiconductor CorporationProduct Portfolio Pin Configuration2, 3Electrical Characteristics Over the Operating Range Maximum RatingsOperating Range Thermal Resistance10 Data Retention Characteristics Over the Operating RangeAC Test Loads and Waveforms10 Data Retention Waveform1345 ns 55 ns 70 ns Parameter Description Min Switching Characteristics Over the Operating Range14Min Max Unit Read Cycle Write CycleSwitching Waveforms Read Cycle 1 Address Transition Controlled18Read Cycle No OE Controlled19 Write Cycle No WE Controlled17, 21 Write Cycle No CE Controlled17, 21Data I/O Write Cycle No WE Controlled, OE LOW22 Write Cycle No BHE/BLE Controlled, OE LOW22DATAI/O Data Inputs/Outputs Mode Power Ordering InformationBHE BLE Ball Vfbga 6 x 8 x 1 mm Package DiagramPin Tsop II Issue Date Orig. Description of Change Document HistoryREV ECN no