Cypress CY62146EV30 Thermal Resistance, AC Test Loads and Waveforms, Data Retention Waveform

Page 4

CY62146EV30 MoBL®

Capacitance (For All Packages) [9]

Parameter

Description

Test Conditions

 

Max

Unit

CIN

Input Capacitance

TA = 25°C, f = 1 MHz,

 

10

pF

 

 

VCC = VCC(typ)

 

 

 

COUT

Output Capacitance

 

10

pF

Thermal Resistance [9]

 

 

 

 

Parameter

Description

Test Conditions

VFBGA

TSOP II

Unit

Package

Package

ΘJA

Thermal Resistance

Still Air, soldered on a 3 × 4.5 inch,

75

77

°C/W

 

(Junction to Ambient)

two-layer printed circuit board

 

 

 

ΘJC

Thermal Resistance

 

10

13

°C/W

 

(Junction to Case)

 

 

 

 

AC Test Loads and Waveforms

VCC

R1

ALL INPUT PULSES

V

OUTPUT

30 pF

INCLUDING

JIG AND

SCOPE

 

CC

 

 

 

 

 

 

90%

 

90%

 

 

10%

 

 

 

 

 

10%

 

 

 

 

 

 

 

 

 

 

 

R2

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rise Time = 1 V/ns

 

 

 

 

 

 

 

 

 

Fall Time = 1 V/ns

 

 

 

 

 

 

 

 

 

 

Equivalent to: THEVENIN EQUIVALENT

RTH

OUTPUT V

Parameters

2.50V

3.0V

Unit

R1

16667

1103

 

 

 

 

R2

15385

1554

 

 

 

 

RTH

8000

645

VTH

1.20

1.75

V

Data Retention Characteristics (Over the Operating Range)

Parameter

Description

 

Conditions

Min

Typ [2]

Max

Unit

VDR

VCC for Data Retention

 

 

 

1.5

 

 

V

ICCDR [8]

Data Retention Current

VCC = 1.5V,

 

> VCC – 0.2V,

 

 

0.8

7

A

CE

 

 

 

 

VIN > VCC – 0.2V or VIN < 0.2V

 

 

 

 

 

tCDR [9]

Chip Deselect to Data Retention Time

 

 

 

 

0

 

 

ns

t [10]

Operation Recovery Time

 

 

 

t

RC

 

 

ns

R

 

 

 

 

 

 

 

 

Data Retention Waveform

 

 

VCC(min)

DATA RETENTION MODE

VCC(min)

V

CC

V

> 1.5V

 

tCDR

DR

 

tR

 

 

 

 

CE

 

 

 

 

Notes:

 

 

 

 

 

9. Tested initially and after any design or process changes that may affect these parameters.

 

10. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.

 

Document #: 38-05567 Rev. *C

Page 4 of 12

Image 4
Contents Functional Description FeaturesProduct Portfolio Logic Block Diagram Pin Configurations 3Ball Vfbga Pin Tsop Top ViewMaximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Data Retention Characteristics Over the Operating Range Thermal ResistanceAC Test Loads and Waveforms Data Retention Waveform45 ns Parameter Description Min Max Unit Read Cycle Write CycleAddress Switching WaveformsData OUT Previous Data Valid Write Cycle No WE Controlled 15, 19 Write Cycle No CE Controlled 15, 19Write Cycle No WE Controlled, OE LOW Inputs/Outputs Mode Power Truth TableOrdering Information BHE BLEPackage Diagrams Ball Vfbga 6 x 8 x 1 mmPin Tsop II Document History Issue Date Orig. Description of ChangeREV ECN no