Cypress CY62146EV30 Write Cycle No WE Controlled 15, 19, Write Cycle No CE Controlled 15, 19

Page 7

CY62146EV30 MoBL®

Write Cycle No. 1 (WE Controlled) [15, 19, 20]

Notes:

19.Data IO is high impedance if OE = VIH.

20.If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.

21.During this period, the IOs are in output state and input signals must not be applied.

Document #: 38-05567 Rev. *C

Page 7 of 12

Image 7

Contents Functional Description FeaturesProduct Portfolio Top View Logic Block DiagramPin Configurations 3 Ball Vfbga Pin TsopMaximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Data Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance AC Test Loads and WaveformsWrite Cycle 45 ns Parameter Description Min Max Unit Read CycleAddress Switching WaveformsData OUT Previous Data Valid Write Cycle No CE Controlled 15, 19 Write Cycle No WE Controlled 15, 19Write Cycle No WE Controlled, OE LOW BHE BLE Inputs/Outputs Mode PowerTruth Table Ordering InformationBall Vfbga 6 x 8 x 1 mm Package DiagramsPin Tsop II Document History Issue Date Orig. Description of ChangeREV ECN no