American Telecom AM64/128A manual 3 X.21 Loop Control, Modem

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Configuration Menu

AM64/128A User Manual

 

 

5.7.3 X.21 Loop Control

This facility is designed for when a pair of BBM’s are used as an extension to another BBM link. The concept is shown below.

To DTE

slavemaster

Modem

 

Modem

 

X2.1 Link

Modem

 

Modem

A

 

B

 

 

C

 

D

 

 

 

 

 

 

 

 

Normal BBM to BBM link

 

 

External link or network

 

 

 

Figure 5.7.3

 

 

To DTE

BBM’s A and B form part of a conventional link. However in this example, instead of a DTE being connected to BBM B another link is started. This link extension starts with BBM C, which is in turn connected to BBM D (or even a line card feeding into a network). Details of the second link are not important. If BBM A (or the DTE it is connected to) attempts to apply a remote loop, it would normally be applied at B. However, if the X.21 loops off option is applied at B, then the remote loop command will travel through to BBM D. The remote loop has thus been applied at the very far end of the network. The option effectively tells BBM B to ignore any loop requests from the line. Any internally activated loops (i.e. from the front panel) behave as before.

Note: if this option is applied the RX NRDY LED in BBM B will not function as all the data is now treated as structured (no status line - ‘Not Ready’ patterns have no meaning).

The normal ‘loops on’ mode is shown in the menu as:

C > X21 Loops On

Pressing SELECT enables ‘loops off’, shown as: C > X21 Loops Off

5.7.4 Synchronisation Type (for software versions below V1.3)

This option is only applicable to master mode with external timing.

This option allows the user to change the type of clock synchronisation within the BBM.

Normally in a point to point link, the master BBM becomes the source of timing and the slave BBM locks to this. If a further link is driven as shown in figure 5.7.3, then the external BBM C must supply a source of timing to the master BBM B. This timing can be of two forms Bit Timing, or Byte Timing.

Bit timing is selected with the display

C > Bit Sync

The Bit timing signal must be of the same frequency as the user bit rate. The circuitry is designed to be supplied with the timing clock output from an other BBM.

The signal connections are via the interface connectors, (see appendix A).

The Byte timing signal is shown by

C > Byte Sync

The Byte timing signal must be a half wide pulse every 8 data bits. The BBM is designed to accept the byte timing output from a slave BBM operating at 64kb/sec. Signal connections are via the interface connectors (Appendix A).

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Contents ATL Part No /203/002/610 Issue 4 September Base Band ModemInformation Contained This Document is Confidential to Contents Appendix B Introduction International ModelsBaseband Modems Constructional DetailsInterface Modules System Overview System Overview BBM to BBM Link InstallationTesting Self Test PassLTU Ready No Alarm LTU Not Ready Link ModeNetwork Mode BBM to Line Card LinkFront Panel Features Menu OperationLoop back Off Loop back OnOver all Status Status MenuLoop Active LOS/CD Fail Alarm StatusNo Alarm No Signal Receiving AIS No Alignment CD FailLine Rate User RateInterface Status Operating Mode Link Mode Network ModeLocal loop from menu Top level display shows Loc Loop Off Test MenuLocal loop Loc Loop OnLoopback is applied by selecting the display Loopback Off LoopbackLocal loop from DTE Loopback OnRem Loop Off Remote LoopRemote Loop from menu Rem Loop OnRemote loop from DTE Binary PatternsBin Keys Off Sending Bin Overview Error Count Bit Error Rate BER = User Data Rate x TimeData Test OperationErrors Errors nnnnnnErrors s000001 Data TestInjecting 0s Injection ModeTransparent Mode Injecting 1sComms Evp Rx Evp Tx Service TestSvc Test Time If the count is stopped the display is StopLamp Test Self TestCommunication Channel Loopback Comm Loop OffRate Menu Rate 4.8KMaster 64K BT Slave 4.8K Option Menu 2 X.21bisSignalling Rate Asynchronous Mode3 G.703 Character Length Char LenMaster Slave Configuration MenuLine Rate Modem 3 X.21 Loop ControlSynchronisation Type for software versions below Ext Bit Clk Synchronisation Type for software version V1.3 and aboveExt Byte Clk Internal ClkPower Level 5 64k ModeMenu Lock Glossary of Terms Band circuits General Specifications Way D-type X.21 V.11 Connector pin allocation Way D type X.21 bis V.24 / V.28* Connector pin allocationAppendix a Interface Pin Connections Mrac Connector Pin allocation Way D-type V.36 Connector pin allocationWay D-type RS-530 Connector pin allocation Line ConnectorAppendix B Internal Link Settings Page Interface Modules Interface ModuleRS530 Interface Module 21bis Interface ModuleService Test Facilities Frame StructureAppendix C In Service Test LVD Safety Statements TTE Network and Safety statementsAppendix E 21 bit timing cable 15 way to 15 way D type plugs24 / V.28 bit timing cable 25 way to 25 way D type plugs 21 byte timing cable 15 way to 15 way D type plugs35 bit timing cable 34 way to 34 way Mrac plugs 21 bis V.36 bit timing cable 37 way to 37 way D type plugs RS530 bit timing cable 25 way to 25 way D type plugsAppendix F Troubleshooting Master Mode C 64K Rate Slave Mode 64K RatePower 10dBm Rate 64K