American Telecom AM64/128A manual Frame Structure, Service Test Facilities

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Appendix C - In Service Test	AM64/128A User Manual

APPENDIX C - In Service Test

BACKGROUND INFORMATION

The information passing between master and slave BBM’s comprises of user data and control data; the latter is used for controlling and supervising the operation of the transmission system. In order that these components can be separated the composite data is transmitted in frames with a fixed framing pattern to identify the frame boundary. Data is transferrred at 71.1 kbps at the high rate and 142.2 kbps at double rate.

C.1 Frame Structure

For both rates the frame structure is the same. Figure C.1 shows the basic frame structure. Each frame consists of 160 bits of which 12 are allocated to the framing pattern and 4 to the control channel. (These 4 bits per frame are termed the Comms channel). This leaves 144 bits, or 18 octets for user data. With most rates the user data actually occupies 6 bits out of every octet, as one bit is used as the user status line, and the other bit is used as an envelope alignment bit, (this bit is used by the system for the multiplexing of lower user rates into the 71.1 / 142.2 kbps over all bit rates). There are several user rates which do not have an alignment bit; these are 16, 32, 56, 64 and 128 kbps, consequently these rates will not be able to use the envelope alignment error monitoring schemes. At the high rate the maximum throughput for the user is 64 kbps (no status, no alignment); at double rate it is 128 kbps.

C.2 In Service Test Facilities

The In Service Test has access to two basic sources of information:

(1)The envelope alignment bits

(2)The comms channel

The use of the envelope alignment bits is slightly more straight forward.

At either end of the link the BBM monitors these alignment bits against tables held in ROM. Any bits received in error are counted and can be displayed. For each frame there are 18 envelope alignment bits for 18 x 6 bits of data. The effective data error rate can then be found from:

Envelope Error Count x6

Bit Error Rate (BER) = _______________________

User Data Rate x Time

A-8

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Contents Base Band Modem ATL Part No /203/002/610 Issue 4 SeptemberInformation Contained This Document is Confidential to Contents Appendix B International Models IntroductionInterface Modules Constructional DetailsBaseband Modems System Overview System Overview Self Test Pass InstallationTesting BBM to BBM LinkLink Mode LTU Ready No Alarm LTU Not ReadyBBM to Line Card Link Network ModeMenu Operation Front Panel FeaturesLoop back On Loop back OffLoop Active Status MenuOver all Status CD Fail Alarm StatusNo Alarm No Signal Receiving AIS No Alignment LOS/CD FailInterface Status User RateLine Rate Link Mode Network Mode Operating ModeLoc Loop On Test MenuLocal loop Local loop from menu Top level display shows Loc Loop OffLoopback On LoopbackLocal loop from DTE Loopback is applied by selecting the display Loopback OffRem Loop On Remote LoopRemote Loop from menu Rem Loop OffBin Keys Off Sending Bin Binary PatternsRemote loop from DTE Operation Error Count Bit Error Rate BER = User Data Rate x TimeData Test OverviewData Test Errors nnnnnnErrors s000001 ErrorsInjecting 1s Injection ModeTransparent Mode Injecting 0sTime If the count is stopped the display is Stop Service TestSvc Test Comms Evp Rx Evp TxSelf Test Lamp TestComm Loop Off Communication Channel LoopbackRate 4.8K Rate MenuMaster 64K BT Slave 4.8K 2 X.21bis Option Menu3 G.703 Asynchronous ModeSignalling Rate Char Len Character LengthLine Rate Configuration MenuMaster Slave Synchronisation Type for software versions below 3 X.21 Loop ControlModem Internal Clk Synchronisation Type for software version V1.3 and aboveExt Byte Clk Ext Bit ClkMenu Lock 5 64k ModePower Level Glossary of Terms Band circuits General Specifications Appendix a Interface Pin Connections Way D type X.21 bis V.24 / V.28* Connector pin allocationWay D-type X.21 V.11 Connector pin allocation Way D-type V.36 Connector pin allocation Mrac Connector Pin allocationLine Connector Way D-type RS-530 Connector pin allocationAppendix B Internal Link Settings Page Interface Module Interface Modules21bis Interface Module RS530 Interface ModuleFrame Structure Service Test FacilitiesAppendix C In Service Test TTE Network and Safety statements LVD Safety Statements21 bit timing cable 15 way to 15 way D type plugs Appendix E35 bit timing cable 34 way to 34 way Mrac plugs 21 byte timing cable 15 way to 15 way D type plugs24 / V.28 bit timing cable 25 way to 25 way D type plugs RS530 bit timing cable 25 way to 25 way D type plugs 21 bis V.36 bit timing cable 37 way to 37 way D type plugsAppendix F Troubleshooting Rate 64K Slave Mode 64K RatePower 10dBm Master Mode C 64K Rate