Diamond Systems PR-Z32-E-ST, PR-Z32-EA-ST user manual 15.A/D SCAN, INTERRUPT, and Fifo Operation

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15.A/D SCAN, INTERRUPT, AND FIFO OPERATION

The control bits SCANEN (scan enable) and AINTE (A/D interrupt enable) in conjunction with the FIFO determine the behavior of the board during A/D conversions and interrupts.

At the end of an AD conversion, the 16-bit A/D data is latched into the 8-bit FIFO in an interleaved fashion, first LSB, then MSB. A/D Data is read out of the FIFO with 2 read operations, first Base + 0 (LSB) and then Base + 1 (MSB).

When SCANEN = 1, each time an A/D trigger occurs, the board will perform an A/D conversion on all channels in the channel range programmed in Base + 2. When SCANEN = 0, each time an A/D trigger occurs, the board will perform a single A/D conversion and then advance to the next channel and wait for the next trigger.

During interrupt operation (AINTE = 1), the FIFO will fill up with data until it reaches the threshold programmed in the FIFO threshold register, and then the interrupt request will occur. If AINTE = 0, the FIFO threshold is ignored and the FIFO continues to fill up.

If the FIFO reaches its limit of 48 samples, then the next time an A/D conversion occurs the Overflow flag OVF will be set. In this case the FIFO will not accept any more data, and its contents will be preserved and may be read out. In order to clear the overflow condition, the program must reset the FIFO by writing to the FIFORST bit in Base + 1, or a hardware reset must occur.

In Scan mode (SCANEN = 1), the FIFO threshold should be set to a number at least equal to the scan size and in all cases equal to an integral number of scans. For example if the scan size is 8 channels, the FIFO threshold should be set to 8, 16, 24, 32, 40, or 48, but not less than 8. This way the interrupt will occur at the end of the scan, and the interrupt routine can read in a complete scan or set of scans each time it runs.

In non-scan mode (SCANEN = 0), the FIFO threshold should be set to a level that minimizes the interrupt rate but leaves enough time for the interrupt routine to respond before the next A/D conversion occurs. Remember that no data is available until the interrupt occurs, so if the rate is slow the delay to receive A/D data may be long. Therefore for slow sample rates the FIFO threshold should be small. If the sample rate is high, the FIFO threshold should be high to reduce the interrupt rate. However remember that the remaining space in the FIFO determines the time the interrupt routine has to respond to the interrupt request. If the FIFO threshold is too high, the FIFO may overflow before the interrupt routine responds. A good rule of thumb is to limit the interrupt rate to no more than 1,000-2,000 per second in Windows and Linux or 10,000 per second in DOS. Experimentation may be necessary to determine the optimum FIFO threshold for each application.

The table on the next page describes the board’s behavior for each of the 4 possible cases of AINTE and SCANEN. The given interrupt software behavior describes the operation of the Diamond Systems Universal Driver software. If you write your own software or interrupt routine you should conform to the described behavior for optimum results.

Prometheus CPU User Manual V1.44

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Contents Prometheus Table of Contents 22.4 22.2CPU DescriptionFeatures System FeaturesProcessor Section Digital I/O Counter/TimersAnalog Input Analog OutputPrometheus Board Drawing Cable B Main I/O Connector J3O Headers Cable aIR RX, IR TX Connector Part NumbersCOM1 COM4 LPT1Input Power J11 Output Power J12 Ethernet J4USB J5 Watchdog/Failsafe Features J6 Auxiliary Serial Port Connector J15IDE Drive J8 Floppy Drive J7Signal Name Definition Data Acquisition I/O Connector J14 Model PR-Z32-EA onlyJ2 PC/104 16-bit bus connector J1 PC/104 8-bit bus connector 11 PC/104 Bus ConnectorsJumper Configuration J10 System ConfigurationCmos RAM J6 Watchdog Timer & System Recovery System Features System ResourcesCPU Chip Selects Console Redirection to a Serial Port Watchdog Timer Flash Memory Failsafe Mode / Bios RecoveryBackup Battery System ResetBios Bios SettingsDOS Bios Download / Recovery Initial Setup Disk-On-Board Flash File StorageOperating System Formatting Life Cycle Management and Calculations Known LimitationsEthernet System I/OParallel Port Serial PortsInstalling an OS From a Floppy Drive onto a Flashdisk Module Booting to DOS From a Floppy DriveInstalling an OS from a Hard Disk onto a Flashdisk Module Data Acquisition Circuit LSB Data Acquisition Circuitry I/O MAPBase Address Base + Write Function Read FunctionAD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Data Acquisition Circuit Register MapCommand Register Register Bit DefinitionsBase + AD9 AD8 Base + ReadValue = Base + 0 value + Base + 1 value Base + Write Not Used ReadBase + Read/Write Channel Register Base + Write Analog Input Gain STS Wait Dacbsy OVF Scanen Base + Read Analog Input StatusFT5 FT4 FT3 FT2 FT1 FT0 Base + Read/Write Interrupt / DMA / Counter ControlCKSEL1 CKFRQ1 CKFRQ0 Adclk Dmaen Tinte Dinte Ainte Base + Read/Write Fifo ThresholdFD5 FD4 FD3 FD2 FD1 FD0 Base + WriteDA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Base + Read Channel and Fifo StatusBase + Read Analog Operation Status Base + Write DAC MSB + Channel NoDACH1 DACH0 DA9 DA8Dioctr = Base + Read / WriteBase + Read / Write Digital I/O Control Register Dioctr Dira Dirch Dirb DirclBase + Read/Write Counter/Timer D7 Base + Read/Write Counter/Timer D15Base + Read/Write Counter/Timer D23 Ctrno Latch Gtdis Gten Ctdis Cten Load CLR Base + Write Counter/Timer Control RegisterREV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 Base + Read Fpga Revision CodeData Acquisition Circuit Configuration Analog Output Configuration Single-ended / Differential InputsUnipolar / Bipolar Inputs Input Range Selection Analog Input Ranges and ResolutionInput Range Resolution 1 LSB OverviewPerforming AN A/D Conversion LSB = inpbase MSB = inpbase+1 Perform an A/D conversion on the current channelInput voltage = A/D value / 32768 * Full-scale input range 15.A/D SCAN, INTERRUPT, and Fifo Operation Prometheus A/D Operating Modes LOW, HighAinte Scanen LSB = Output voltage range Analog Output Ranges and ResolutionResolution DescriptionREF 1 LSB 16.4 D/A Conversion Formulas and TablesConversion Formulas for Bipolar Output Ranges Generating AN Analog Output 18.3 A/D full-scale Analog Circuit Calibration18.1 A/D bipolar offset 18.2 A/D unipolar offsetDigital I/O Operation COUNTER/TIMER Operation Counter 0 A/D Sample ControlCounter 1 Counting/Totalizing Functions Counter Command SequencesCounter Outpbase+15,0x01 Outpbase+15,0x81 Data Acquisition Specifications Flashdisk Module ConfigurationUsing the Flashdisk with Another IDE Drive Power Supply23. I/O Panel Board USB a Panel Board I/O ConnectorsPanel Board Top Side / External Use I/O Connectors Location Type DescriptionJ12 pinout to/from DC/DC power supply Panel Board Power ConnectionsJ3 Pinout J5 USB J9 Pinout InstallationFlash Disk Programmer Board 25.I/O Cables Photo No Cable No DescriptionCable Kit C-PRZ-KIT VGA Accessory Board PL5 pin no PL5 Signal J25 pin no J25 SignalPL5 pin no DB15F pin no Signal Website information Prometheus Connector Manufacturer Manufacturer Part NoMounting Prometheus on a Baseboard LinksPage 28.PC/104 Mechanical Drawing

PR-Z32-E-ST, PR-Z32-EA-ST specifications

The Diamond Systems PR-Z32-EA-ST and PR-Z32-E-ST are pioneering solutions in the realm of embedded computing systems, designed to meet the challenging demands of various industrial applications. These boards harness advanced technologies and a comprehensive feature set to ensure exceptional performance, flexibility, and reliability.

At the heart of the PR-Z32 series is a robust processor architecture that combines efficiency with processing power. The systems are built around the Zynq-7000 SoC (System on Chip), which integrates a dual-core ARM Cortex-A9 processor with Xilinx FPGA technology. This hybrid architecture provides the ability to run complex algorithms and custom logic concurrently, making the boards ideal for applications requiring intense computational tasks such as image processing, data acquisition, and real-time control.

One of the main features of the PR-Z32-EA-ST and PR-Z32-E-ST is their versatility. Both variants support a wide range of I/O options, including USB, Ethernet, CAN, and serial interfaces. This range of connectivity allows for integrations with various sensors, actuators, and other peripheral devices, making it suitable for industrial automation, robotics, and IoT projects. The inclusion of multiple GPIO pins also enhances the capability of the boards to interface with additional hardware.

In terms of performance, the PR-Z32 series supports substantial amounts of on-board memory, which can be essential for applications requiring the storage and processing of large datasets. The configurations are often customizable, allowing users to select the appropriate amount of RAM and on-board flash memory for their specific applications.

Reliability is a critical characteristic of the Diamond Systems PR-Z32 series. The boards are built to withstand adverse environmental conditions, making them suitable for deployment in industrial environments. They are often designed to operate over a wide temperature range, ensuring functionality in both hot and cold climates. Additionally, the boards are compliant with various industry standards, assuring users of their robustness and durability.

Moreover, the PR-Z32-EA-ST and PR-Z32-E-ST support real-time operating systems (RTOS) and conventional operating systems such as Linux. This support provides developers with the flexibility to choose the best environment for their applications, whether they require real-time performance or full-fledged operating system features.

In conclusion, the Diamond Systems PR-Z32-EA-ST and PR-Z32-E-ST are formidable options for those seeking powerful, versatile, and reliable embedded computing solutions. With their advanced SoC architecture, flexible I/O options, extensive memory configurations, and environmental resilience, these boards are well-equipped to tackle the challenges of modern industrial applications.