Silicon Image SSD-DXXX(I)-4210 manual Ultra DMA Data Burst Timing Requirements

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ELECTRICAL SPECIFICATION

SSD-DXXX(I)-4210 DATA SHEET

Ultra DMA Data Burst Timing Requirements

The following figures and table describe the requirements for the Ultra DMA

(UDMA) data burst timing.

DMARQ (device)

tUI

DMACK-

(host)

tACK

STOP (host)

tENV

tFS

tZAD

HDMARDY-

(host)

tACKtENV

tZIORDY

tFS

tZAD

DSTROBE

(device)

tAZ

tDVS

DD(15:0)

tACK

DA0, DA1, DA2,

CS0-, CS1-

tDVH

Figure 6: Initiating a UDMA Data-In Burst

Note: The definitions for the DIOW-:STOP, DIOR-:HDMARDY-:HSTROBE, and IORDY:DDMARDY-:DSTROBE signal lines are not in effect until DMARQ and DMACK are asserted.

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4210D-03DSR

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FEBRUARY 2, 2009

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Contents Features OverviewDocument No Release Date Changes UpdatedRevision History AddedTable of Contents ATA Command Set Sales and Support Part Numbering Related DocumentationList of Figures List of Tables Idle Immediate 95h, E1h Part Numbering Nomenclature Physical Specifications Physical DimensionsPin Locations System Performance Product SpecificationsSystem Power Requirements Operational Life Span SiliconDrive Part# Capacity Service Life GB Written per DayReliability Product Capacity Number Sectors Bytes Cylinders Heads Track Product Capacity SpecificationsEnvironmental Specifications Pin Electrical SpecificationPin Assignments Ultra DMAData Inputs/Outputs. This is the 8-bit or Signal DescriptionsSignal Name Pins Type Description Disk Active/Slave Present. This openDMA Request. This signal is used for DMA Transfers between the host and deviceInterrupt Request. This signal is an active This signal is a DMA request that is usedGround. The device ground signal For DMA data transfers between the hostWhen Udma mode DMA read is active Channel Ready. The signal is negatedWhen Udma mode DMA write is active Device I/O Read. This is the read strobeAbsolute Maximum Ratings Device Power Supply. The device powerSymbol Parameter Minimum Maximum Units DC Characteristics Symbol Parameter 5V ± 10% Units Minimum MaximumTrue IDE PIO Mode Read/Write Access Timing True IDE PIO Mode Read/Write Access Timing DiagramTrue IDE PIO Mode Read/Write Access Timing True IDE Multiword DMA Read/Write Access Timing True IDE Multiword DMA Read/Write Access Timing Symbol Mode 0 Mode Mode 3 Mode 4 Note UnitsUltra DMA Data Burst Timing Requirements Initiating a Udma Data-In BurstSustained Udma Data-In Burst Device Terminating a Udma Data-In Burst Host Terminating a Udma Data-In Burst Initiating a Udma Data-Out Burst Device Pausing a Udma Data-Out Burst Host Terminating a Udma Data-Out Burst Device Terminating a Udma Data-Out Burst Udma Data Burst Timing RequirementsMin Max Min. Max Time from Strobe edge to ns CS0# CS1# DA02 DA01 DA00 Task File Register SpecificationATA and True IDE Register Decoding Error Register ATA RegistersRead/Write Feature RegisterOperation ByteRead/Write Sector Count Default Value Sector Count RegisterLogical Block Number bits A07-A00 LBA Addressing Sector Number RegisterRead/Write Logical Block Number bits A15-A08 LBA Addressing Cylinder Low RegisterLow Cylinder High Register Logical Block Number bits A23-A16 LBA AddressingDrive/Head Register LBA27 LBA26 LBA25 LBA24Corrected Data CORR. Always set to Drive Write Fault DWF. Always set toStatus Register Command Register Operation Read/Write ATA Command CodeAlternate Status Register NIEN Device Control RegisterWrite Read/Write NWTG NHS3 NHS2 NHS1 NHS0 NDS1 NDS0 Default Value Device Address RegisterATA Command Set ATA Command Block and SET DescriptionATA Command Block and Set Description Class Command Name Registers Used CodeATA Command Set Register Check Power Mode 98h, E5hCheck Power Mode 98h, E5h Executive Drive Diagnostic 90h Executive Drive Diagnostic 90hFormat Track 50h Drive Head Number LBA27-24 Command 50hFormat Track 50h Identify Drive ECh Identify Drive EChWord Data Default Bytes Data Description Address Identify Drive Drive Attribute DataIdentify Drive Drive Attribute Data Identify Drive Drive Attribute Data Idle 97h, E3h Idle 97h, E3hIdle Immediate 95h, E1h Idle Immediate 95h, E1hInitialize Drive Parameters 91h Initialize Drive Parameters 91hRecalibrate 1Xh Drive Command 1XhRecalibrate 1Xh Read Buffer E4h Read Buffer E4hRead DMA C8h Drive Head Number LBA27-24 Command C8hRead DMA C8h Read Multiple C4h Drive Head Number LBA27-24 Command C4hRead Multiple C4h Read Sector 20h, 21h Drive Head Number LBA27-24 Command 20h or 21hRead Sector 20h, 21h Read Long Sectors 22h, 23h Drive Head Number LBA27-24 Command 22h or 23hRead Long Sectors 22h, 23h Read Verify Sectors 40h, 41h Drive Head Number LBA27-24 Command 40h or 41hRead Verify Sectors 40h, 41h Seek 7Xh Drive Head Number LBA27-24 Command 7XhSeek 7Xh Set Features’ Attributes Set Features EFhSet Features EFh Feature OperationSet Multiple Mode C6h Set Multiple Mode C6hSet Sleep Mode 99h, E6h Set Sleep Mode 99h, E6hStandby 96h, E2h Standby 96h, E2hStandby Immediate 94h, E0h Standby Immediate 94h, E0hWrite Buffer E8h Write Buffer E8hWrite DMA CAh Drive Head NumberLBA27-24 Command CAhWrite DMA CAh Write Multiple C5h Drive Head NumberLBA27-24 Command C5hWrite Multiple C5h Write Sectors 30h, 31h Drive Head Number LBA27-24 Command 30h or 31hWrite Sectors 30h, 31h Write Long Sectors 32h, 33h Drive Head Number LBA27-24 Command 32h or 33hWrite Long Sectors 32h, 33h Erase Sectors C0h Drive Head Number LBA27-24 Command C0hErase Sectors C0h Request Sense 03h Extended Error CodesExtended Error Codes Description Request Sense 03hTranslate Sector 87h Drive Head Number LBA27-24 Command 87hTranslate Sector 87h Wear-Level F5h Wear-Level F5hWrite Multiple w/o Erase CDh Drive Head Number LBA27-24 Command CDhWrite Multiple w/o Erase CDh Write Sectors w/o Erase 38h Drive Head Number LBA27-24 Command 38hWrite Sectors w/o Erase 38h Write Verify 3Ch Drive Head Number LBA27-24 Command 3ChWrite Verify 3Ch Part Numbering Nomenclature Sales and SupportPart Numbering Part NumbersStandard Back Label with Front Label Lot Code InformationSiliconDrive EP Application-Specific Description Related DocumentationRelated Documentation Technology

SSD-DXXX(I)-4210 specifications

The Silicon Image SSD-DXXX(I)-4210 is a cutting-edge solid-state drive designed for high-performance computing applications. Designed to cater to both consumer and enterprise markets, the SSD-DXXX(I)-4210 stands out for its robust features and advanced technologies, making it an ideal choice for those who demand reliability and speed.

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The SSD-DXXX(I)-4210 is built using 3D NAND flash memory, which not only increases storage density but also provides better performance and reliability compared to traditional 2D NAND. This technology allows for higher capacity options while reducing power consumption, resulting in energy-efficient operation. Users can select from multiple storage capacities, catering to various needs, from casual users to data-intensive enterprises.

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