The MSTR Instruction
Register | Content | ||
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Displayed | Identifies one of ten MSTR operations legal for TCP/IP | ||
(1 ... 4 and 7 ... 12). | |||
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First implied | Displays error status. | ||
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Second implied | Displays length (number of registers transferred). | ||
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Third implied | Displays MSTR | ||
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Fourth implied | High byte: Destination index. | ||
| Low byte: Quantum backplane slot address of the web | ||
| embedded server module. | ||
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Fifth implied | Byte 4 of the | ||
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Sixth implied | Byte 3 | of the | |
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Seventh implied | Byte 2 | of the | |
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Eight implied | Byte 1 | of the | |
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Middle Node | The 4x register entered in the middle node is the first in a group of contiguous |
Content | holding registers that comprise the data area. For operations that provide the |
| communication processor with data such as a Write operation, the data area is the |
| source of the data. For operations that acquire data from the communication |
| processor, such as a Read operation, the data area is the destination for the data. |
| In the case of the Ethernet Read and Write CTE operations (see sections 3.2.11 |
| and 3.2.12), the middle node stores the contents of the Ethernet configuration |
| extension table in a series of registers. |
Bottom Node | The integer value entered in the bottom node specifies the length - the maximum |
Content | number of registers in the data area. The length must be in the range 1 ... 100. |
3.2.3MSTR Function Error Codes
| If an error occurs during an MSTR operation, a hexadecimal error code will be |
| displayed in the first implied register in the control block (the top node). Function |
| error codes are |
TCP/IP Ethernet | An error in an MSTR routine over TCP/IP Ethernet may produce one of the |
Error Codes | following errors in the MSTR control block: |
28 | 840 USE 115 00 Version 1.0 |