Using the Network Options Ethernet Tester
Receive Interrupts and Transmit Interrupts. The number of times the PCNET controller chip has generated interrupts.
Transmit timeout errors. The number of times the transmitter has been on the channel longer than the interval required to send the maximum length frame of 1519 bytes. This is also known as a babble error.
Collision errors. The number of collisions detected by the Ethernet chip.
Missed packet errors. The number of times a received frame was dropped because a receive descriptor was not available.
Memory errors. The number of times an Ethernet controller chip experienced an error accessing shared RAM. A memory error will cause a restart.
PcNet restart count. The number of times the Ethernet controller chip was restarted due to fatal runtime errors, including memory errors, transmit buffer errors and transmit underflow.
Framing error. The number of times an incoming frame contained a non- integer multiple of eight bits.
Overflow errors. The number of times the receiver has lost part or all of an incoming frame, due to an inability to store the frame in memory before the internal FIFO overflowed.
CRC errors. The number of times a CRC (FCS) error was detected on an incoming frame.
Receive buffer errors. The number of times a receive buffer was not available while data chaining a received frame.
Transmit buffer errors. The number of times the end packet flag on the current buffer was not set and the Ethernet controller did not own the next buffer. A transmit buffer error causes a restart.
Silo Underflow. The number of times a packet was truncated due to data late from memory. A Silo Underflow will cause a restart.
Late Collision. The number of times a collision was detected after the slot time of the channel had elapsed.
zLost Carrier. The number of times a carrier was lost during a transmission.
Transmit retries. The number of times the transmitter has failed after 16 attempts to transmit a message, due to repeated collisions.
These statistics also may be obtained from the MSTR block. Refer to the Ladder Logic Block Library User Guide for details.
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