Agilent Technologies 66lxxA manual Standard Event Status Group, Power Module Status Model

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Figure 4-1. Power Module Status Model

Standard Event Status Group

Register Functions

This group consists of an Event register and an Enable register that are programmed by COMMON commands. The Standard Event register latches events relating to interface communication status (see Table 4-2). It is a read-only register that is cleared when read. The Standard Event Enable register functions similarly to the enable registers of the Operation and Questionable status groups.

Register Commands

The common *ESE command programs specific bits in the Standard Event Status Enable register. Because the power module implements *PSC, the register is cleared at power on if *PSC = 1.

*ESR? reads the Standard Event Status Event register. Reading the register clears it.

Status Reporting 53

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Contents Agilent Part No Microfiche Part No Update April Programming GuideSafety Guidelines Contents Abor Status Reporting Synchronizing Power Module Output Changes Error MessagesIntroduction About This GuideDocumentation Summary External ReferencesVXIplug&play Power Products Instrument Drivers Downloading and Installing the DriverAccessing Online Help Supported ApplicationsGpib Capabilities Of The Power Module Introduction To ProgrammingModule Gpib Address Introduction To ScpiRST *IDN? *SRE Volt LEV Prot Curr Voltlev 8.0 Prot 8.8 CURR?Outpprotdel Traversing the Command Tree Effect of Optional HeadersOutputprotectionclear STATUSOPERATIONCONDITION? OUTPUTPROTECTIONCLEARSTATUSOPERATIONCONDITION?Voltagelevel 7PROTECTION 8CURRENTLEVEL 3MODE List Volttrig 7.5INIT*TRG Outp OFF*RCL 2OUTP onSymbol Numerical Data Formats Talking FormatsListening Formats Suffixes and Multipliers Class Unit Unit with MultiplierSystem Considerations Assign @PM3TOError Handling Agilent Basic ControllersUsing the National Instruments Gpib Interface Sending the Command Volt 5 in Basic Sending the Command Volt 5 in CReceiving Data from the Module Receiving Module Data with BasicReceiving Module Data with C Language Dictionary IntroductionDescription Of Common Commands CLSMeaning and Type DescriptionBit Configuration of Standard Event Status Enable Register ESEESE ESR?OPC IDN?OPC? OPT? PSCRCL RCLRST SRE SAVSRE STB? Bit Configuration of Status Byte RegisterTRG Description of Subsystem Commands TST?WAI AborSubsystem Tree Diagram Calibration Subsystem CalautoCalauto 1 Calauto Once CalcurrCalcurrlev CalpassCalsave CalstatCalvolt CalvoltlevCalvoltprot CurrCurr 500 MA Currlev CurrmodeCurrprotstat Currprotstat OFFCurrtrig Currtrig 1200 MA CurrlevtrigInit Initcont 1 Initcont on ListcounListcoun Listcoun INF ListcurrLISTCURRPOIN? ListdwelLISTDWELPOIN? ListstepListvolt Listvolt 2.0,2.5,3.0 Listvolt MAX,2.5,MINLISTVOLTPOIN? MEASCURR? MEASVOLT?Outp Outpstat ON,NORELAY OutpprotOutpprotcle Outpprotdel 75E-1 OutprelOutprelpol NormOutpttlt Outpttlt 1 Outpttlt OFFOutpttltlink Outpttltsour LinkSTATOPER? STATOPEREVEN?STATOPERCOND? StatoperenabStat Oper NTR 32 Stat Oper PTR StatpresSTATQUES? STATQUESEVEN?STATQUESCOND? Stat Ques COND?SYSTERR? SYSTVERS?Trigger Subsystem TrigTrig Trig IMM TrigdelTrigdel .25 Trigdel MAX TriglinkVolt VoltlevVoltmode Voltmode List Voltmode FIXVolttrig VOLTSENSSOUR?Volttrig 1200 MV Voltlevtrig Power Module Programming Parameters Link Parameter ListPower Module Status Structure Status Register Bit ConfigurationStatus Reporting Operation Status GroupStatus Questionable Commands Query Bit Signal Bit Configurations of Status Registers MeaningQuestionable Status Group Power Module Status Model Standard Event Status GroupOutput Queue Status Byte RegisterLocation Of Event Handles Initial Conditions At Power On ExamplesStatoperptr 5376ENAB Statquesptr 18ENABSTATOPEREVEN?QUESEVEN? Statoperptr 1024NTR Statoperenab 1024*SRETrigger Subsystem Synchronizing Power Module Output ChangesModel of Fixed-Mode Trigger Operation Idle State Delaying StateInitiated State Model of List Mode Trigger Operation INITiateCONTinuous CommandTrigger Status and Event Signals Output Change StateOutpttltsour List Subsystem Listvolt 3.0,3.25,3.5,3.75 Listdwel 10,10,25,40 Automatically Repeating a ListListcurr 2,3,12,15 Triggering a ListTiming diagrams of Liststep Operation Scpi Command Completion DFI Discrete Fault Indicator SubsystemRI Remote Inhibit Subsystem Error Messages Power Module Hardware Error MessagesSystem Error Messages Standard Event Status Register Error Bits222 -223 -241 -310 -330 -350 -400 -410 -420 -430 Scpi Confirmed Commands Scpi Approved CommandsScpi Conformance Information Scpi VersionNon-SCPI Commands Application Programs Application 1. Sequencing Multiple Modules During Power Up Figure B1-1. Block Diagram of Application #1 Variations On This ImplementationFigure B1-2. Timing Diagram of Application #1 Reset and Clear Module Enable Backplane TTL Trigger DriveEnable Output Enable Response to TriggerImplementation Details How The MPS Implements The Solution MPS Set Up Figure B2-1. Block Diagram of Application #2 When a CV-TO-CC Transition Occurs Enable TTL Trigger DriveEnable Response to TTL Trigger Start AT 15Application 3. Controlling Output Voltage Ramp Up at Turn On Figure B3-1. Simulating a Slow Voltage Ramp Generating the Desired Voltage Ramp for Application #3 Option Base Start Voltage for RampStop Voltage for Ramp SecondsApplication 4. Providing Time-Varying Voltages Figure B4-1. Voltage Waveform for Application #4Module set up Variations On This Implementation Enable OCP No Delay Before Protection OccursEnable Detection of OC Condition Enables Detection on Positive TRANSITION, I.EApplication 5. Providing Time-Varying Current Limiting Figure B5-1. Typical DUT Current vs. Time Implementation Details How The MPS Implements The Sequence GO to 12 V When Triggered Current Limit DataDwell Time Data SET to GET Current from ListApplication 6. Output Sequencing Paced by the Computer Nominal 12MPS Set Up Figure B6-1. Block Diagram of Application #6 These are the Bias Supply Limit ConditionsTo be Tested Number of Bias Supply Limit C0MBINATIONSReturn Overview Of Application Advantages/Benefits Of The MPS Solution Figure B7-1. Block Diagram of Application #7 When the Module Indicates SIC Step Completed When IT Completes the LIST. OPC Generates SROEnable SRQ Interrupt Enable Intr Identify Handler SubroutineSupplemental Information CMD$ = Output on ‘ Enable Output CMD$ = Initiate ‘ Enable Trigger to Start List‘ Conversion to Send Real Numbers Over the BUS CMD$ = Voltmode List ‘ SET to GET Voltage from ListCall Iooutputs SLOTO, CMDS, L Waiting for Trigger BIT 5 of the Operation Status RegisterCONDITION.DATA = Wend‘ Disable Auto Serial Poll If IBSTA% 0 then Goto ‘ AS Part of the Command String‘ Program N3.BAS ‘ INSTRUMENT.NAME$ = SlotoIf IBSTA% 0 then Goto Selected AS a Trigger Source ‘ General Error HandlerStop Application #3 Controlling Voltage Ramp UP AT Turn on Dwell = ramptimeTo terminate the iooutputa Int error Char *badstring If error != EOl enabled for both read and write Strcatvlist, vpoint This is a generalized error checking routine Index IndexIndex Index Index Agilent Sales and Support Offices United States Latin AmericaManual Updates