Agilent Technologies 66lxxA Application 6. Output Sequencing Paced by the Computer, Nominal 12

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Application 6. Output Sequencing Paced by the Computer

Overview Of Application

When performing bias supply margin testing, throughput can be maximized by eliminating the command processing time associated with reprogramming all outputs for each set of limit conditions. Instead, multiple sets of bias limit conditions can be downloaded to the power modules during test system initialization. During the testing, the computer can use a single command to simultaneously signal all power modules to step through each test condition.

In this example, the DUT requires + 5 V and ± 12 V. The DUT is tested to ensure proper operation at marginal supply voltages. The margin specified is ± 5 % of nominal voltage. At each of the combinations given below, the computer first sets up the three modules and makes a measurement on the DUT. The combinations to be tested are:

Nominal 5 V

Nominal + 12 V

Nominal - 12 V

4.75 V

12 V

-12 V

5 V

12 V

-12 V

5.25 V

12 V

-12 V

5 V

11.4 V

-12 V

5 V

12.6 V

-12 V

5 V

12 V

- 11.4 V

5 V

12 V

- 12.6 V

When conducting this test, the modules will need to be reprogrammed 21 times and seven measurements made. The command processing time could slow down this test.

The MPS can be used to increase throughput. By downloading all of the combinations into the three modules, each setting can be quickly stepped through by triggering all modules to change to their next voltage setting and then taking a measurement from the DUT. This permits testing without command processing overhead.

MPS Features Used

20-point voltage List.

Trigger-paced Lists.

Trigger in/out from MPS mainframe backplane TTL Trigger.

Trigger on a GPIB trigger command.

Advantages/Benefits Of The MPS Solution

By using Lists, the module changes its voltage without delays due to processing the command to change the output voltage. By using triggers, all three outputs can be changed with one command.

The computer loop to change the settings and take a measurement is simplified, because you do not have to explicitly reprogram each module output. Instead, the loop becomes "Trigger" and "Measure".

Implementation Details

How The MPS Implements The Sequence

The following steps are performed for each point in the List:

The computer sends a trigger command to the first module.

The first module simultaneously sends a backplane TTL Trigger to the other two modules and goes to its next List point. The second module receives the backplane TTL Trigger and immediately goes to its next List point.

The third module receives the backplane TTL Trigger, immediately goes to its next List point. The computer gets a measurement from the measurement instrument.

90 Application Programs

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Contents Programming Guide Agilent Part No Microfiche Part No Update AprilSafety Guidelines Contents Abor Status Reporting Error Messages Synchronizing Power Module Output ChangesAbout This Guide IntroductionDocumentation Summary External ReferencesDownloading and Installing the Driver VXIplug&play Power Products Instrument DriversAccessing Online Help Supported ApplicationsIntroduction To Programming Gpib Capabilities Of The Power ModuleModule Gpib Address Introduction To ScpiRST *IDN? *SRE Voltlev 8.0 Prot 8.8 CURR? Volt LEV Prot CurrOutpprotdel Effect of Optional Headers Traversing the Command TreeOUTPUTPROTECTIONCLEARSTATUSOPERATIONCONDITION? Outputprotectionclear STATUSOPERATIONCONDITION?Voltagelevel 7PROTECTION 8CURRENTLEVEL 3MODE List Volttrig 7.5INIT*TRG Outp OFF*RCL 2OUTP onNumerical Data Formats Talking Formats SymbolListening Formats Suffixes and Multipliers Class Unit Unit with MultiplierAssign @PM3TO System ConsiderationsAgilent Basic Controllers Error HandlingUsing the National Instruments Gpib Interface Sending the Command Volt 5 in C Sending the Command Volt 5 in BasicReceiving Module Data with Basic Receiving Data from the ModuleReceiving Module Data with C Introduction Language DictionaryCLS Description Of Common CommandsMeaning and Type DescriptionESE Bit Configuration of Standard Event Status Enable RegisterESE ESR?OPC? IDN?OPC PSC OPT?RST RCLRCL SRE SAVSRE TRG Bit Configuration of Status Byte RegisterSTB? TST? Description of Subsystem CommandsWAI AborCalauto Subsystem Tree Diagram Calibration SubsystemCalcurr Calauto 1 Calauto OnceCalcurrlev CalpassCalstat CalsaveCalvolt CalvoltlevCurr CalvoltprotCurr 500 MA Currlev CurrmodeCurrprotstat OFF CurrprotstatCurrtrig Currtrig 1200 MA CurrlevtrigListcoun Init Initcont 1 Initcont onListcoun Listcoun INF ListcurrListdwel LISTCURRPOIN?LISTDWELPOIN? ListstepListvolt 2.0,2.5,3.0 Listvolt MAX,2.5,MIN ListvoltLISTVOLTPOIN? MEASCURR? MEASVOLT?Outpprot Outp Outpstat ON,NORELAYOutprel Outpprotcle Outpprotdel 75E-1Outprelpol NormOutpttlt 1 Outpttlt OFF OutpttltOutpttltlink Outpttltsour LinkSTATOPEREVEN? STATOPER?STATOPERCOND? StatoperenabStatpres Stat Oper NTR 32 Stat Oper PTRSTATQUESEVEN? STATQUES?STATQUESCOND? Stat Ques COND?SYSTVERS? SYSTERR?Trigger Subsystem TrigTrigdel Trig Trig IMMTrigdel .25 Trigdel MAX TriglinkVoltlev VoltVoltmode Voltmode List Voltmode FIXVolttrig 1200 MV Voltlevtrig VOLTSENSSOUR?Volttrig Link Parameter List Power Module Programming ParametersStatus Register Bit Configuration Power Module Status StructureStatus Reporting Operation Status GroupQuestionable Status Group Bit Signal Bit Configurations of Status Registers MeaningStatus Questionable Commands Query Standard Event Status Group Power Module Status ModelLocation Of Event Handles Status Byte RegisterOutput Queue Examples Initial Conditions At Power OnStatquesptr 18ENAB Statoperptr 5376ENABSTATOPEREVEN?QUESEVEN? Statoperptr 1024NTR Statoperenab 1024*SREModel of Fixed-Mode Trigger Operation Synchronizing Power Module Output ChangesTrigger Subsystem Initiated State Delaying StateIdle State INITiateCONTinuous Command Model of List Mode Trigger OperationTrigger Status and Event Signals Output Change StateOutpttltsour List Subsystem Automatically Repeating a List Listvolt 3.0,3.25,3.5,3.75 Listdwel 10,10,25,40Listcurr 2,3,12,15 Triggering a ListTiming diagrams of Liststep Operation RI Remote Inhibit Subsystem DFI Discrete Fault Indicator SubsystemScpi Command Completion Power Module Hardware Error Messages Error MessagesSystem Error Messages Standard Event Status Register Error Bits222 -223 -241 -310 -330 -350 -400 -410 -420 -430 Scpi Approved Commands Scpi Confirmed CommandsScpi Conformance Information Scpi VersionNon-SCPI Commands Application Programs Application 1. Sequencing Multiple Modules During Power Up Variations On This Implementation Figure B1-1. Block Diagram of Application #1Figure B1-2. Timing Diagram of Application #1 Enable Backplane TTL Trigger Drive Reset and Clear ModuleEnable Output Enable Response to TriggerImplementation Details How The MPS Implements The Solution MPS Set Up Figure B2-1. Block Diagram of Application #2 Enable TTL Trigger Drive When a CV-TO-CC Transition OccursEnable Response to TTL Trigger Start AT 15Application 3. Controlling Output Voltage Ramp Up at Turn On Figure B3-1. Simulating a Slow Voltage Ramp Generating the Desired Voltage Ramp for Application #3 Start Voltage for Ramp Option BaseStop Voltage for Ramp SecondsFigure B4-1. Voltage Waveform for Application #4 Application 4. Providing Time-Varying VoltagesModule set up Variations On This Implementation No Delay Before Protection Occurs Enable OCPEnable Detection of OC Condition Enables Detection on Positive TRANSITION, I.EApplication 5. Providing Time-Varying Current Limiting Figure B5-1. Typical DUT Current vs. Time Implementation Details How The MPS Implements The Sequence Current Limit Data GO to 12 V When TriggeredDwell Time Data SET to GET Current from ListNominal 12 Application 6. Output Sequencing Paced by the ComputerMPS Set Up Figure B6-1. Block Diagram of Application #6 Supply Limit Conditions These are the BiasTo be Tested Number of Bias Supply Limit C0MBINATIONSReturn Overview Of Application Advantages/Benefits Of The MPS Solution Figure B7-1. Block Diagram of Application #7 When IT Completes the LIST. OPC Generates SRO When the Module Indicates SIC Step CompletedEnable SRQ Interrupt Enable Intr Identify Handler SubroutineSupplemental Information CMD$ = Initiate ‘ Enable Trigger to Start List CMD$ = Output on ‘ Enable Output‘ Conversion to Send Real Numbers Over the BUS CMD$ = Voltmode List ‘ SET to GET Voltage from ListWaiting for Trigger BIT 5 of the Operation Status Register Call Iooutputs SLOTO, CMDS, LCONDITION.DATA = WendIf IBSTA% 0 then Goto ‘ AS Part of the Command String ‘ Disable Auto Serial Poll‘ Program N3.BAS ‘ INSTRUMENT.NAME$ = SlotoStop ‘ General Error HandlerIf IBSTA% 0 then Goto Selected AS a Trigger Source Dwell = ramptime Application #3 Controlling Voltage Ramp UP AT Turn onTo terminate the iooutputa Int error Char *badstring If error != EOl enabled for both read and write Strcatvlist, vpoint This is a generalized error checking routine Index IndexIndex Index Index United States Latin America Agilent Sales and Support OfficesManual Updates