Your ePlatform Partner
User’s Manual for Advantech
|
|
| address. |
|
|
|
|
| |
|
|
| PCMCIA | write | enable. | Performs |
| ||
|
|
| writes to PCMCIA memory and to |
| |||||
B40 | nBUF_PWE | O | PCMCIA attribute space. Also used | No pulling | |||||
|
|
| as the write enable signal for |
| |||||
|
|
| Variable Latency I/O. |
|
|
| |||
|
|
| GPIO | pin. | Advantech | default |
| ||
|
|
| function is used as matrix Keypad |
| |||||
|
|
| IRQ. The pin directly connects to |
| |||||
A40 | KEYPAD_IRQ | I | PXA255 GPIO2 (L13 pin). If user | No pulling | |||||
|
|
| doesn’t use the matrix key pad |
| |||||
|
|
| function, use can use this pin as |
| |||||
|
|
| GPIO pin. |
|
|
|
| ||
B41 | N.C. | - | N.C. just float this pin. |
|
| - | |||
|
|
|
|
|
|
|
| No pulling | |
|
|
| GPIO pin. The pin directly connects | (For | |||||
|
|
| |||||||
A41 | PXA_GP7 | IO | to PXA255 GPIO7 (G15 pin). This | ||||||
|
|
| GPIO pin is available for user to use. | is | |||||
|
|
| PXA_GPIO | ||||||
|
|
|
|
|
|
|
| 7) | |
|
|
| Advantech use this pin to control |
| |||||
|
|
| companion chip as IRQ function. |
| |||||
|
|
| The pin is not available for CSB |
| |||||
B42 | EVA_IRQ | - | design | of | & | - | |||
|
|
|
| ||||||
|
|
| & |
| |||||
|
|
| pin. This pin is directly connected to |
| |||||
|
|
| SoC PXA255 GPIO9(F12). |
|
|
| |||
|
|
| Advantech default function is used |
| |||||
|
|
| as external 16C950 solution IC IRQ. |
| |||||
| C950_485_IR |
| The pin directly connects to PXA255 |
| |||||
A42 | I | GPIO10 (F7 pin). If user doesn’t | No pulling | ||||||
Q | |||||||||
|
|
| design 16C950 on CSB to expand |
| |||||
|
|
| COM function, user could use this |
| |||||
|
|
| pin as GPIO. |
|
|
|
| ||
|
|
| Advantech default function is used |
| |||||
|
|
| as external LAN solution IC IRQ. The |
| |||||
|
|
| pin directly connects to PXA255 |
| |||||
B43 | LAN1_IRQ | I | GPIO17 (D12 pin). If user doesn’t | No pulling | |||||
|
|
| design the other LAN chip on CSB to |
| |||||
|
|
| expand LAN function, user could use |
| |||||
|
|
| this pin as GPIO. |
|
|
| |||
|
|
| Advantech default function is used |
| |||||
|
|
| as external USB host solution IC |
| |||||
|
|
| IRQ. The pin directly connects to |
| |||||
A43 | USB_IRQ | I | PXA255 GPIO27 (B9 pin). If user | No pulling | |||||
|
|
| doesn’t design the other USB |
| |||||
|
|
| solution chip on CSB to expand USB |
| |||||
|
|
| host function, user could use this pin |
| |||||
|
|
| as GPIO. |
|
|
|
|
29