Advantech SOM-A2552 manual System Specifications, Cpld

Page 10

Your ePlatform Partner

User’s Manual for Advantech SOM-A2552 series module V1.00

CPLD

SOM-A2552 series have one CPLD on board. The CPLD take charges of the following function:

System memory assignments

I/O control

RTC control

Base on Advantech policy, Advantech won’t release the CPLD code to user. In fact, when user designs their own target carrier board, they don’t need to know the CPLD code. Advantech will release memory map of available memory block and available GPIOs. These are fully enough to users to develop their own carrier board.

1.2 System Specifications

The following table is SOM-A2552 series functional specifications.

SOM-A2552 standard product specification table

Model Name

SOM-A2552-440B0

Reconfiguration Option

 

Func.

 

 

 

 

 

 

 

 

CPU

PXA255-400MHz

200/300/400 MHz

Graphic Chip

SMI SM501 with 8MB embedded

SM501 with /without 8MB

 

SDRAM

embedded SDRAM

 

 

System Memory(SDRAM)

64MB

16/32/64/128 MB

Booting Flash

1MB NOR Flash

-

 

On-board Flash (Image &

0MB

0/16/32/64MB

 

Storage )

 

 

 

OS Image Storage

WinCE.NET

Linux(By customer request)

 

AMI Bus(X1 Bus)

100-pin B2B connector with driving

Yes

 

buffers

 

 

 

Feature Extension

100-pin B2B connector (Provide ZV

Yes

Bus(X2 Bus)

& SD/MMC I/F)

 

 

Watch Dog

PXA255 internal

-

 

RTC

External RTC w/backup power pin

Yes

 

System Backup battery

RTC/SDRAM

-

 

Serial Port

3x Full RS-232 (TTL), 1x 2-wires

-

 

RS-232 (TTL),1x 3-wires

 

 

RS-232/RS-485

 

 

PCMCIA/Compact flash

2 slots PCMCIA/CF or

-

 

I/F

1xPCMCIA, 1xCF

 

 

 

USB Host

1x USB 1.1 Host

-

 

USB Client

1x USB Client

-

 

SD/MMC

Ix Ch(Support

-

 

Memory mode)

 

 

 

 

CRT-out

Up to 1280*1024

-

 

TV Interface

TV out

 

 

ZV port

Yes

-

 

LCD TTL Interface

SM501 24 bit LCD interface,

-

 

resolution up to 1280*1024

 

 

 

 

Touch Screen Interface

4-wire resistive

Yes

 

 

 

 

 

10

Image 10
Contents User’s Manual Advantech Risc SOM-A2552 Series ModuleCopyright AcknowledgementsRevision History Version Date Reason SOM-A200 architecture SOM-A2552 series Architecture 1.1 IntroductionSOM-A2552 series Design highlight SOM-A2552 benefit SOM-A255x series support CD includes Testing SetSOM-A2552 series design-in package Software Development ToolsLCD-A064-TTV1-0 Optional item Risc CE-BuilderLCD-A057-STQ1-0 Optional item LCD-A104-TTS1-0 Optional itemSOM-A2552 Block diagram Enhance Graphic Chip SMI SM501 introduction SoC Intel XScale PXA255 introductionSystem Memory System Specifications CpldAudio Codec Mechanical Specification Symbol Description Min Typ Max Power System RequirementPower Consumption Input DC Operating ConditionsConnector Locations Assignments and DescriptionsX3 Feature Extension connector CSB Mating Connector table VendorX2 SODIMM-200 connector X1 AMI busJP1 PXA255 Jtag pin header Pin DefinitionSODIMM-200 Pin Out Table Pin typeSASKTA7 SASKTA9SASKTA6 SASKTA4SASKT1VCC AC97LINEINMicin SASKT1RDYPwren SASKT0VCCBatvcc SYSVCC3P3 NDCINSysvcc SmbusdatUSBLINK5V UsbcpBuzzerout UART2RTSUART2DTR UART2CTSUART3TXD UART3CTSUSBP1 VbkenaUSBN1 UART5RXDCrtsda VconrcsCrtvsync FlmvsyncLphsync ADDR13 ADDR15ADDR14 ADDR12BUFDQM3 BUFDQM0BUFDQM2 BufsdclkADDR23 ADDR19ADDR21 DATA0Evairq KeypadirqPXAGP7 LAN1IRQPXAGP83 PXAGP81PXAGP82 PXAGP84Mbreq DMAREQ1DMAACK1 Mbgnt Model Default stateB50 A50 3M6864A18 A20ZV9 MMDAT3MMDAT0 ZV8ZV4 ZV6ZV5 ZV3A50 System Bus2 COM Vpclk5 T/S USB 1.1 HostUSB 1.1 client 7 SD/MMCCRT-out Zoom Video ZV port System Reset InterfaceBuzzer Control Interface System Management Bus SM Bus interface Power-inputBack-up power input PCI I/F Thru