Sony 4-216-349-0 US model 4-216-349-1 Canadian model 4-216-349-2 AEP MNT0 FOK, MNT1 Shck, Srdt

Page 44

•IC121 Digital Signal Processor, Digital Servo Signal Processor, EFM/ACIRC Encoder/Decoder, Shock-proof Memory Controller, ATRAC Encoder/Decoder, 2M Bit DRAM (CXD2654R) (BD board)

Pin No.

Pin Name

I/O

 

 

 

 

Function

 

 

 

 

 

 

 

 

1

MNT0 (FOK)

O

 

FOK signal output to the system control (monitor output)

 

“H” is output when focus is on

 

 

 

 

 

 

 

 

 

 

 

 

2

MNT1 (SHCK)

O

 

Track jump detection signal output to the system control (monitor output)

 

 

 

 

 

 

 

 

3

MNT2 (XBUSY)

O

 

Monitor 2 output to the system control (monitor output)

 

 

 

 

 

 

 

 

4

MNT3 (SLOC)

O

 

Monitor 3 output to the system control (monitor output)

 

 

 

 

 

 

 

 

5

SWDT

I

 

Writing data signal input from the system control

 

 

 

 

 

 

 

 

6

SCLK

I (S)

 

Serial clock signal input from the system control

 

 

 

 

 

 

 

 

7

XLAT

I (S)

 

Serial latch signal input from the system control

 

 

 

 

 

 

 

 

8

SRDT

O (3)

 

Reading data signal output to the system control

 

 

 

 

 

 

 

 

9

SENS

O (3)

 

Internal status (SENSE) output to the system control

 

 

 

 

 

 

 

 

10

XRST

I (S)

 

Reset signal input from the system control “L”: Reset

 

 

 

 

 

 

 

 

11

SQSY

O

 

Subcode Q sync (SCOR) output to the system control

 

“L” is output every 13.3 msec. Almost all, “H” is output

 

 

 

 

 

 

 

 

 

 

 

 

12

DQSY

O

 

Digital In U-bit CD format or MD format subcode Q sync (SCOR) output to the system

 

control

 

 

 

 

 

 

 

 

 

 

 

 

13

RECP

I

 

Laser power switching input from the system control “H”: Recording, “L”: Playback

 

 

 

 

 

 

 

 

14

XINT

O

 

Interrupt status output to the system control

 

 

 

 

 

 

 

 

15

TX

I

 

Recording data output enable input from the system control

 

 

 

 

 

 

 

 

16

OSCI

I

 

System clock input (512Fs=22.5792 MHz)

 

 

 

 

 

 

 

 

17

OSCO

O

 

System clock output (512Fs=22.5792 MHz) (Not used)

 

 

 

 

 

 

 

 

18

XTSL

I

 

System clock frequency setting “L”: 45.1584 MHz, “H”: 22.5792 MHz (Fixed at “H”)

 

 

 

 

 

 

 

 

19

DIN0

I

 

Digital audio input (Optical input)

 

 

 

 

 

 

 

 

20

DIN1

I

 

Digital audio input (Optical input)

 

 

 

 

 

 

 

 

21

DOUT

O

 

Digital audio output (Optical output)

 

 

 

 

 

 

 

 

22

DADTI

I

 

Serial data input

23

LRCKI

I

 

LR clock input “H” : Lch, “L” : R ch

 

 

 

 

 

 

 

 

24

XBCKI

I

 

Serial data clock input

 

 

 

 

 

25

ADDT

I

 

Data input from the A/D converter

 

 

 

 

 

 

 

 

26

DADT

O

 

Data output to the D/A converter

 

 

 

 

 

 

 

 

27

LRCK

O

 

LR clock output for the A/D and D/A converter (44.1 kHz)

 

 

 

 

 

 

 

 

28

XBCK

O

 

Bit clock output to the A/D and D/A converter (2.8224 MHz)

 

 

 

 

 

 

 

 

29

FS256

O

 

11.2896 MHz clock output (Not used)

 

 

 

 

 

30

DVDD

—

 

+3V power supply (Digital)

 

 

 

 

 

31 to 34

A03 to A00

O

 

DRAM address output

35

A10

O

 

DRAM address output (Not used)

 

 

 

 

 

 

 

 

36 to 40

A04 to A08

O

 

DRAM address output

 

 

 

 

 

 

 

 

41

A11

O

 

DRAM address output (Not used)

 

 

 

 

 

 

 

 

42

DVSS

—

 

Ground (Digital)

43

XOE

O

 

Output enable output for DRAM

 

XCAS

 

 

 

44

O

 

 

CAS

signal output for DRAM

45

A09

O

 

Address output for DRAM

 

 

 

 

 

 

 

 

46

XRAS

O

 

 

 

 

signal output for DRAM

 

RAS

 

 

 

 

 

47

XWE

O

 

Write enable signal output for DRAM (Used : CXD2652AR, Not used : CXD2650R)

 

 

 

 

 

 

 

 

* I (S) stands for Schmidt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O

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Contents Specifications MDS-JE330SELF-DIAGNOSIS Function Items of Error History Mode Items and Contents Flexible Circuit Board Repairing VarnigTable of Contents DisassemblyDiagrams Exploded ViewsSection Servicing Note JIG for Checking BD Board WaveformIOP TEORecord Precedure Checks Prior to Parts Replacement and Adjustments Forced ResetCriteria for Determination Measure if unsatisfactory REC/PLAYRetry Cause Display Mode Bit BinaryHexadecimal Binary Bit When BinaryHigher Bits Lower Bits Hexa Details Front Panel Section GeneralLocation of Parts and Controls Slider CAM Section DisassemblyCase and Front Panel Base Unit MBU-5A and BD Board SW Board and Loading Motor M103Section Test Mode Precautions for USE of Test ModeSetting the Test Mode Exiting the Test ModeSelecting the Test Mode GroupOperating the Continuous Playback Mode Non-Volatile Memory Mode EEP ModeMID OUTTest Mode Displays Functions of Other ButtonsMeanings of Other Displays Section Electrical Adjustments Parts Replacement and AdjustmentPrecautions for Checking Laser Diode Emissinon Precautions for USE of Optical PICK- UP KMS-260APrecautions for Adjustments Creating Continuously Recorded DiscTemperature Compensation Offset Check Laser Power CheckChecks Prior to Repairs Specified ValuePlay Checking MO Error Rate Check CD Error Rate CheckFocus Bias Check Self-Recording/playback CheckInitial Setting of Adjustment Value Temperature Compensation Offset AdjutmentLaser Power Adjustment Recording and Displaying the IOP InformationTraverse Adjustment Focus Bias Adjustment Error Rate Check Auto Gain Control Output Level AdjustmentCD Auto Gain Control Output Level Adjustment MO Auto Gain Control Output Level AdjustmentAdjusting Points and Connecting Points Section Diagrams Circuit Boards LocationBlock Diagrams BD Section MDS-JE330Main Section LD-LOVOFor schematic diagrams For printed wiring boardsWaveforms Display SectionPrinted Wiring Board BD Section Semiconductor LocationSchematic Diagram BD 1/2 Section Schematic Diagram BD 2/2 Section Schematic Diagram Main 1/2 Section Schematic Diagram Main 2/2 Section Printed Wiring Board Main Section Printed Wiring Board Panel Section Schematic Diagram Panel Section BD Section IC101 Schematic Diagram BD Switch Section IC Block DiagramsPrinted Wiring Board BD Switch Section IC121 CXD2654R IC152 BH6511FS-E2IC406 M62016L Main section IC301 UDA1341TS/N2IC381 M5218AL IC441 LB1641 Pin No Pin Name Function IC PIN FunctionsIC101 RF Amplifier CXA2523AR BD board MNT0 FOK MNT1 ShckMNT2 Xbusy MNT3 SlocMvci AsyoAsyi AvddTfdr FfdrFrdr FS4IC501 System Control M30620MC-400FP Main board OPT DEL OPT SEL Mode SEL PB-PREC/PB SDASection Exploded Views Case and Back Panel SectionFront Panel Section 6162Mechanism Section MDM-5A 225 226 206 205Base Unit Section MBU-5A 251 252Section Electrical Parts List ResistorsDisplay Display KEY SW Main PIN, Connector 7P Inductor MDS-JE330 Main SW VOL SEL Vibrator
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