| SDHC Memory Card + Reader P2 | |
|
|
|
Note that for current SD Memory Cards that field must be always 0_0110_010b (032h) which is equal to 25MHz - the mandatory maximum operating frequency of SD Memory Card.
In
•CCC
The SD Memory Card command set is divided into subsets (command classes). The card command class register
CCCdefines which command classes are supported by this card. A value of ‘1’ in a CCC bit means that the corresponding command class is supported.
•READ_BL_LEN
This field is fixed to 9h, which indicates READ_BL_LEN=512 Byte.
•READ_BL_PARTIAL
This field is fixed to 0, which indicates partial block read is inhibited and only unit of block access is allowed.
•WRITE_BLK_MISALIGN
This field is fixed to 0, which indicates write access crossing physical block boundaries is always disabled in High Capacity SD Memory Card.
•READ_BLK_MISALIGN
This field is fixed to 0, which indicates read access crossing physical block boundaries is always disabled in High Capacity SD Memory Card.
•DSR_IMP
Defines if the configurable driver stage is integrated on the card. If set, a driver stage register (DSR)must be implemented also.
Transcend Information Inc.
16