Transcend Information TS4G-32GSDHC6-P2 manual Sdsecurity, Sdbuswidths

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TS4G-32GSDHC6-P2

SDHC Memory Card + Reader P2

 

 

 

Defines the data status after erase, whether it is ‘0’ or ‘1’ (the status is card vendor dependent).

SD_SECURITY

Describes the security algorithm supported by the card.

SD Supported Security Algorithm

Note that it is mandatory for a regular writable SD Memory Card to support Security Protocol. For ROM (Read Only) and OTP (One Time Programmable) types of the SD Memory Card, the security feature is optional. In the case of Standard Capacity SD Memory Card, this field shall be set to 2 (Version 1.01). In the case of High Capacity SD Memory Card, this field shall be set to 3 (Version 2.00).

SD_BUS_WIDTHS

Describes all the DAT bus widths that are supported by this card.

Since SD Memory Card shall support at least the two bus modes 1bit or 4bit width then any SD Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101").

Transcend Information Inc.

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Contents TS4G-32GSDHC6-P2 Architecture Bus Signal Line Load Power Supply VoltageGeneral Current ConsumptionSingle card capacitance Bus Signal Levels Bus Timing Output Delay time during Data Transfer Mode Bus Timing High Speed Mode Output Hold time Reliability and Durability OCR register Register InformationMID OIDPNM PSN PRVMDT CRCCSD Register Fields CSD Version CsdstructureTaac NsacTranspeed Readbllen CCCReadblpartial WriteblkmisalignCsize WpgrpenableEraseblken SectorsizePermwriteprotect CopyTmpwriteprotect FileformatRCA Register Scrstructure SdspecDatastataftererase Sdbuswidths SdsecurityMechanical Dimension TS4G-32GSDHC6-P2 TS4G-32GSDHC6-P2 Features Description PlacementDimensions System RequirementsBlock Diagram PinoutsPin Identification DC Characteristics DC Electrical Characteristics of 3.3V I/ORecommended Operating Conditions