Transcend Information TS4G-32GSDHC6-P2 manual Output Delay time during Data Transfer Mode

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TS4G-32GSDHC6-P2

 

 

 

SDHC Memory Card + Reader P2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Delay time during Data Transfer Mode

tODLY

0

14

 

ns

CL 40 pF, (1 card)

 

Output Delay time during Identification Mode

tODLY

0

50

 

ns

CL 40 pF, (1 card)

(1) 0 Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required

Transcend Information Inc.

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Contents TS4G-32GSDHC6-P2 Architecture Current Consumption Power Supply VoltageBus Signal Line Load GeneralSingle card capacitance Bus Signal Levels Bus Timing Output Delay time during Data Transfer Mode Bus Timing High Speed Mode Output Hold time Reliability and Durability OCR register Register InformationOID MIDPNM CRC PRVPSN MDTCSD Register Fields CSD Version CsdstructureNsac TaacTranspeed Writeblkmisalign CCCReadbllen ReadblpartialSectorsize WpgrpenableCsize EraseblkenFileformat CopyPermwriteprotect TmpwriteprotectRCA Register Sdspec ScrstructureDatastataftererase Sdbuswidths SdsecurityMechanical Dimension TS4G-32GSDHC6-P2 TS4G-32GSDHC6-P2 System Requirements Description PlacementFeatures DimensionsPinouts Block DiagramPin Identification DC Electrical Characteristics of 3.3V I/O DC CharacteristicsRecommended Operating Conditions