Emerson manual MVME6100 Features Summary, Feature Description, Nvram

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Board Description and Memory Maps

The following table lists the features of the MVME6100.

Table 1-1. MVME6100 Features Summary

Feature	Description

Processor	– Single 1.3 GHz MPC7457 processor
	– Bus clock frequency at 133 MHz
	– 36-bit address, 64-bit data buses
	– Integrated L1 and L2 cache

L3 Cache	– 2MB using DDR SRAM
	– Bus clock frequency at 211 MHz

Flash	– Two banks (A & B) of soldered Intel StrataFlash devices
	– 8 to 64MB supported on each bank
	– Boot bank is switch selectable between banks
	– Bank A has combination of software and hardware write-protect
	scheme
	– Bank B top 1MB block can be write-protected through
	software/hardware write-protect control

System Memory	– Two banks on board for up to 2GB using 256Mb or 512Mb
	devices
	– Bus clock frequency at 133 MHz

Memory Controller	– Provided by Marvell MV64360 system controller
PCI Host Bridge
Dual 10/100/1000 Ethernet
Interrupt Controller
PCI Interface
I2C Interface
NVRAM	– 32KB provided by MK48T37
Real-Time Clock
Watchdog Timer

On-board Peripheral	– Dual 10/100/1000 Ethernet ports routed to front panel RJ-45
Support	connectors, one optionally routed to P2 backplane
	– Two asynchronous serial ports provided by an ST16C554D; one
	serial port is routed to a front panel RJ-45 connector and the second
	serial port is optionally routed to the P2 connector for rear I/O or
	on-board header

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Contents MVME6100 Single-Board Computer Programmer’s Reference GuidePage Ground the Instrument Safety SummaryLithium Battery Caution FlammabilityEMI Caution CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables Model Number Description About This GuideComments and Suggestions Overview of ContentsBold Conventions Used in This ManualOverview IntroductionMVME6100 Features Summary Feature DescriptionNvram PCI/PMC MVME6100 Board Layout Diagram Processor Address Start End Size Definition Default Processor Memory MapDefault Processor Address Map Memory MapsF100 Ffff 29FF Ffff41FF Ffff F0FF FfffMOTLoad’s Processor Address Map MOTLoad’s Processor Memory MapDefault PCI Memory Map Default PCI Address MapPCI Address Start End Size Definition MOTLoad’s PCI Memory Maps MOTLoad’s PCI Memory MapsVME Memory Map System I/O Memory MapCOM 1 Uart Device Bank 1 I/O Memory MapAddress Definition M48T37V NVRAM/RTCBanksel System Status RegisterSystem Status Register RefclkSrominit AbortlFlashbsyl FusestatSystem Status Register 2- 0xF1100001 BdfailEepromwp FlashawpFbawphdr FbootbwpFbootbwphdr TstatmaskBoardreset Reset Board RsvdSystem Status Register 3- 0xF1100002 EREADY1 Presence Detect Register10. Presence Detect Register IpmcprsntPMC0PL Configuration Header/Switch Register S111. Configuration Header/Switch Register Pcieprsntl3 4 5 6 7 TBEN0 Time Base Enable RegisterQuad Universal Asynchronous Receiver/Transmitter Uart 12. Tben Register13. M48T37V Access Real-Time Clock and NvramAddress Offset Function 0xF1110000 Programming Details MV64360 Multi-Purpose Port ConfigurationMPP Pin Input Number Output Function MV64360 MPP Pin Function AssignmentsMV64360 Reset Configuration Srom MV64360 Power-Up Configuration SettingsMV64360 Power-Up Configuration Settings PCI1 DLL DramBADR0 PCI0 DLLMII/GMII GMII/PCS Dram PLL N TBDReal-Time Clock and Nvram Flash MemoryM48T37V Access Two-Wire Serial InterfaceDevice Function Size A2A1A0 Address DDR Dram Serial Presence DetectI2C Bus Device Addressing Device AddressMV64360 Device Controller Bank Assignments VPD and User Configuration EEPROMsTemperature Sensor MV64360 InitializationDevice Bank Assignments MPC Bus and PCI Bus ArbitrationPCI Bus 0 and PCI Bus 1 Local Buses PCI Mode/Frequency SelectionPCI Configuration Space Idsel Mapping for PCI DevicesIdsel AD20 MPP Pin Assignment PCI Masters PCI Arbitration Assignments for MV64360 AsicPCI Bus 1 Local Bus PMC Expansion Slots PCI Arbitration Assignments for MV64360PCI Bus 1 Local Bus PMC Expansion Slots PCI Bus 0 Local Bus DevicesMV64360 Interrupt Controller MV64360 Interrupt AssignmentsGroup MV64360 Edge/Level Polarity Interrupt Source PCI-PMC 0 INTD#, PMC INTB# PCI-PMC 0 INTC#, PMC INTA#DS1621 Digital Thermometer and Thermostat provides MV64360 Endian IssuesMotorola Computer Group Documents Table A-1. Motorola Computer Group DocumentsDocument Title Motorola Publication Number MPC7457EC/D Manufacturers’ DocumentsTable A-2. Manufacturers’ Documents Document Title and Source Publication NumberManufacturers’ Documents Table A-2. Manufacturers’ Documents Table A-3. Related Specifications Related SpecificationsIndex