Emerson MVME6100 manual Dram, PCI1 DLL

Page 39

Programming Details

2Table 2-2. MV64360 Power-Up Configuration Settings (continued)

Device

 

Default

 

 

 

AD Bus

Select

Power-Up

 

 

 

Signal

Option

Setting

Description

State of Bit vs. Function

 

 

 

 

 

 

AD[18]

Resistor

1

DRAM Clock

0

DRAM is running at a

 

 

 

Select

 

higher frequency than the

 

 

 

 

 

core clock

 

 

 

 

 

 

 

 

 

 

1

DRAM is running at a same

 

 

 

 

 

frequency as the core clock

 

 

 

 

 

 

AD[19]

Resistor

1

DRAM

0

DRAM address and control

 

 

 

Address/Contr

 

signals toggle on falling

 

 

 

ol Delay

 

edge of DRAM clock

 

 

 

 

 

 

 

 

 

 

1

DRAM address and control

 

 

 

 

 

signals toggle on rising edge

 

 

 

 

 

of DRAM clock

 

 

 

 

 

 

AD[21:20]

Resistors

01

DRAM control

00

Reserved

 

 

 

path pipeline

 

 

 

 

 

01

Two Pipe stages

 

 

 

select

 

 

 

 

 

 

 

 

 

10

Reserved

 

 

 

 

 

 

 

 

 

 

11

Three pipe stages

 

 

 

 

 

 

AD[24:22]

Resistors

000

DRAM read

000

DRAM running in sync

 

 

 

path control

100

mode

 

 

 

 

 

 

 

 

 

 

001

DRAM running in async

 

 

 

 

111

mode

 

 

 

 

 

 

AD[25]

Fixed

0

Gigabit port 3

0

Disable

 

 

 

Enable

 

 

 

 

 

1

Enable

 

 

 

 

 

 

 

 

 

 

AD[28:26]

Resistors

101

PCI_1 DLL

000

DLL disable

 

 

 

control

 

 

 

 

 

001

Conventional PCI mode at

 

 

 

 

 

 

 

 

 

66MHz

 

 

 

 

 

 

 

 

 

 

101

PCI-X mode at 133 MHz

 

 

 

 

 

 

 

 

 

 

110

PCI-X mode at 66 MHz

 

 

 

 

 

 

2-6

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Image 39
Contents MVME6100 Single-Board Computer Programmer’s Reference GuidePage Ground the Instrument Safety SummaryLithium Battery Caution FlammabilityEMI Caution CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables Model Number Description About This GuideComments and Suggestions Overview of ContentsBold Conventions Used in This ManualOverview IntroductionMVME6100 Features Summary Feature DescriptionNvram PCI/PMC MVME6100 Board Layout Diagram Processor Address Start End Size Definition Default Processor Memory MapDefault Processor Address Map Memory MapsF100 Ffff 29FF Ffff41FF Ffff F0FF FfffMOTLoad’s Processor Address Map MOTLoad’s Processor Memory MapDefault PCI Memory Map Default PCI Address MapPCI Address Start End Size Definition MOTLoad’s PCI Memory Maps MOTLoad’s PCI Memory MapsVME Memory Map System I/O Memory MapCOM 1 Uart Device Bank 1 I/O Memory MapAddress Definition M48T37V NVRAM/RTCBanksel System Status RegisterSystem Status Register RefclkSrominit AbortlFlashbsyl FusestatSystem Status Register 2- 0xF1100001 BdfailEepromwp FlashawpFbawphdr FbootbwpFbootbwphdr TstatmaskBoardreset Reset Board RsvdSystem Status Register 3- 0xF1100002 EREADY1 Presence Detect Register10. Presence Detect Register IpmcprsntPMC0PL Configuration Header/Switch Register S111. Configuration Header/Switch Register Pcieprsntl3 4 5 6 7 TBEN0 Time Base Enable RegisterQuad Universal Asynchronous Receiver/Transmitter Uart 12. Tben Register13. M48T37V Access Real-Time Clock and NvramAddress Offset Function 0xF1110000 Programming Details MV64360 Multi-Purpose Port ConfigurationMPP Pin Input Number Output Function MV64360 MPP Pin Function AssignmentsMV64360 Reset Configuration Srom MV64360 Power-Up Configuration SettingsMV64360 Power-Up Configuration Settings PCI1 DLL DramBADR0 PCI0 DLLMII/GMII GMII/PCS Dram PLL N TBDReal-Time Clock and Nvram Flash MemoryM48T37V Access Two-Wire Serial InterfaceDevice Function Size A2A1A0 Address DDR Dram Serial Presence DetectI2C Bus Device Addressing Device AddressMV64360 Device Controller Bank Assignments VPD and User Configuration EEPROMsTemperature Sensor MV64360 InitializationDevice Bank Assignments MPC Bus and PCI Bus ArbitrationPCI Bus 0 and PCI Bus 1 Local Buses PCI Mode/Frequency SelectionPCI Configuration Space Idsel Mapping for PCI DevicesIdsel AD20 MPP Pin Assignment PCI Masters PCI Arbitration Assignments for MV64360 AsicPCI Bus 1 Local Bus PMC Expansion Slots PCI Arbitration Assignments for MV64360PCI Bus 1 Local Bus PMC Expansion Slots PCI Bus 0 Local Bus DevicesMV64360 Interrupt Controller MV64360 Interrupt AssignmentsGroup MV64360 Edge/Level Polarity Interrupt Source PCI-PMC 0 INTD#, PMC INTB# PCI-PMC 0 INTC#, PMC INTA#DS1621 Digital Thermometer and Thermostat provides MV64360 Endian IssuesMotorola Computer Group Documents Table A-1. Motorola Computer Group DocumentsDocument Title Motorola Publication Number MPC7457EC/D Manufacturers’ DocumentsTable A-2. Manufacturers’ Documents Document Title and Source Publication NumberManufacturers’ Documents Table A-2. Manufacturers’ Documents Table A-3. Related Specifications Related SpecificationsIndex