Emerson MVME6100 manual PCI-PMC 0 INTC#, PMC INTA#, PCI-PMC 0 INTD#, PMC INTB#

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MV64360 Interrupt Controller

 

Table 2-8. MV64360 Interrupt Assignments (continued)

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP

 

 

 

 

 

 

 

 

 

 

Group

 

MV64360

Edge/Level

Polarity

Interrupt Source

 

Notes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[18]

Level

Low

PCI-PMC 0 INTC#, PMC 1

 

2

 

 

 

 

 

 

 

 

INTA#

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[19]

Level

Low

PCI-PMC 0 INTD#, PMC 1

 

2

 

 

 

 

 

 

 

 

INTB#

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[20]

Level

Low

PCI-VME INT 0 (Tsi148

 

1,5

 

 

 

 

 

 

 

 

LINT0#), PMCspan INT 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[21]

Level

Low

PCI-VME INT 1 (Tsi148

 

1,5

 

 

 

 

 

 

 

 

LINT1#), PMCspan INT 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[22]

Level

Low

PCI-VME INT 2 (Tsi148

 

1,5

 

 

 

 

 

 

 

 

LINT2#), PMCspan INT 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[23]

Level

Low

PCI-VME INT 3 (Tsi148

 

1,5

 

 

 

 

 

 

 

 

LINT3#), PMCspan INT 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

GPP[24]

 

 

Reserved for SROM

 

 

 

 

 

 

 

 

 

 

initialization active InitAct

 

 

 

 

 

 

 

 

 

 

output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[25]

 

 

Reserved for Watchdog

 

 

 

 

 

 

 

 

 

 

Timer WDE# output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[26]

 

 

Reserved for Watchdog

 

 

 

 

 

 

 

 

 

 

Timer WDNMI# output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GPP[27]

 

 

Reserved for future device

 

 

 

 

 

 

 

 

 

 

interrupt

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes 1. The interrupting device is addressed from the MV64360 PCI

Bus 0.

2.The interrupting device is addressed from the MV64360 PCI Bus 1.

3.The interrupting device is addressed from the MV64360 Device Bus.

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Contents Programmer’s Reference Guide MVME6100 Single-Board ComputerPage Safety Summary Ground the InstrumentEMI Caution Lithium Battery CautionFlammability CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables About This Guide Model Number DescriptionOverview of Contents Comments and SuggestionsConventions Used in This Manual BoldIntroduction OverviewNvram MVME6100 Features SummaryFeature Description PCI/PMC MVME6100 Board Layout Diagram Memory Maps Default Processor Memory MapDefault Processor Address Map Processor Address Start End Size DefinitionF0FF Ffff 29FF Ffff41FF Ffff F100 FfffMOTLoad’s Processor Memory Map MOTLoad’s Processor Address MapPCI Address Start End Size Definition Default PCI Memory MapDefault PCI Address Map System I/O Memory Map MOTLoad’s PCI Memory MapsVME Memory Map MOTLoad’s PCI Memory MapsM48T37V NVRAM/RTC Device Bank 1 I/O Memory MapAddress Definition COM 1 UartRefclk System Status RegisterSystem Status Register BankselFusestat AbortlFlashbsyl SrominitFlashawp BdfailEepromwp System Status Register 2- 0xF1100001Tstatmask FbootbwpFbootbwphdr FbawphdrSystem Status Register 3- 0xF1100002 BoardresetReset Board Rsvd Ipmcprsnt Presence Detect Register10. Presence Detect Register EREADY1Pcieprsntl Configuration Header/Switch Register S111. Configuration Header/Switch Register PMC0PL3 4 5 6 7 12. Tben Register Time Base Enable RegisterQuad Universal Asynchronous Receiver/Transmitter Uart TBEN0Address Offset Function 0xF1110000 13. M48T37V AccessReal-Time Clock and Nvram MV64360 Multi-Purpose Port Configuration Programming DetailsMV64360 MPP Pin Function Assignments MPP Pin Input Number Output FunctionMV64360 Reset Configuration MV64360 Power-Up Configuration Settings SromMV64360 Power-Up Configuration Settings Dram PCI1 DLLDram PLL N TBD PCI0 DLLMII/GMII GMII/PCS BADR0Flash Memory Real-Time Clock and NvramTwo-Wire Serial Interface M48T37V AccessDevice Address DDR Dram Serial Presence DetectI2C Bus Device Addressing Device Function Size A2A1A0 AddressMV64360 Initialization VPD and User Configuration EEPROMsTemperature Sensor MV64360 Device Controller Bank AssignmentsPCI Mode/Frequency Selection MPC Bus and PCI Bus ArbitrationPCI Bus 0 and PCI Bus 1 Local Buses Device Bank AssignmentsIdsel AD20 PCI Configuration SpaceIdsel Mapping for PCI Devices PCI Arbitration Assignments for MV64360 PCI Arbitration Assignments for MV64360 AsicPCI Bus 1 Local Bus PMC Expansion Slots MPP Pin Assignment PCI MastersPCI Bus 0 Local Bus Devices PCI Bus 1 Local Bus PMC Expansion SlotsGroup MV64360 Edge/Level Polarity Interrupt Source MV64360 Interrupt ControllerMV64360 Interrupt Assignments PCI-PMC 0 INTC#, PMC INTA# PCI-PMC 0 INTD#, PMC INTB#MV64360 Endian Issues DS1621 Digital Thermometer and Thermostat providesDocument Title Motorola Publication Number Motorola Computer Group DocumentsTable A-1. Motorola Computer Group Documents Document Title and Source Publication Number Manufacturers’ DocumentsTable A-2. Manufacturers’ Documents MPC7457EC/DManufacturers’ Documents Table A-2. Manufacturers’ Documents Related Specifications Table A-3. Related SpecificationsIndex