Emerson MVME6100 manual Pci/Pmc

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Overview

Table 1-1. MVME6100 Features Summary (continued)

Feature

Description

 

 

PCI/PMC

– Two 32/64-bit PMC slots with front-panel I/O plus P2 rear I/O as

 

specified by IEEE P1386

 

64-bit slots; 33/66 MHz PCI or 66/100 MHz PCI-X

 

 

VME Interface

– Tsi148 VME 2Esst ASIC provides:

 

Eight programmable VMEbus map decoders

 

A16, A24, A32, and A64 address

 

8-bit, 16-bit, and 32-bit single cycle data transfers

 

8-bit, 16-bit, 32-bit, and 64-bit block transfers

 

Supports SCT, BLT, MBLT, 2eVME, and 2eSST protocols

 

8 entry command and 4KB data write post buffer

 

4KB read ahead buffer

 

 

PMCspan Support

– One PMCspan slot

 

– Supports 33/66 MHz, 32/64-bit PCI bus

 

– Access through PCI6520 bridge to PMCspan

 

 

Form Factor

– Standard 6U VME

 

 

Miscellaneous

– Combined reset and abort switch

 

– Status LEDs

 

8-bit software-readable switch

 

– VME geographical address switch

 

 

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Contents Programmer’s Reference Guide MVME6100 Single-Board ComputerPage Safety Summary Ground the InstrumentFlammability Lithium Battery CautionEMI Caution CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables About This Guide Model Number DescriptionOverview of Contents Comments and SuggestionsConventions Used in This Manual BoldIntroduction OverviewFeature Description MVME6100 Features SummaryNvram PCI/PMC MVME6100 Board Layout Diagram Default Processor Memory Map Default Processor Address MapMemory Maps Processor Address Start End Size Definition29FF Ffff 41FF FfffF0FF Ffff F100 FfffMOTLoad’s Processor Memory Map MOTLoad’s Processor Address MapDefault PCI Address Map Default PCI Memory MapPCI Address Start End Size Definition MOTLoad’s PCI Memory Maps VME Memory MapSystem I/O Memory Map MOTLoad’s PCI Memory MapsDevice Bank 1 I/O Memory Map Address DefinitionM48T37V NVRAM/RTC COM 1 UartSystem Status Register System Status RegisterRefclk BankselAbortl FlashbsylFusestat SrominitBdfail EepromwpFlashawp System Status Register 2- 0xF1100001Fbootbwp FbootbwphdrTstatmask FbawphdrReset Board Rsvd BoardresetSystem Status Register 3- 0xF1100002 Presence Detect Register 10. Presence Detect RegisterIpmcprsnt EREADY1Configuration Header/Switch Register S1 11. Configuration Header/Switch RegisterPcieprsntl PMC0PL3 4 5 6 7 Time Base Enable Register Quad Universal Asynchronous Receiver/Transmitter Uart12. Tben Register TBEN0Real-Time Clock and Nvram 13. M48T37V AccessAddress Offset Function 0xF1110000 MV64360 Multi-Purpose Port Configuration Programming DetailsMV64360 MPP Pin Function Assignments MPP Pin Input Number Output FunctionMV64360 Reset Configuration MV64360 Power-Up Configuration Settings SromMV64360 Power-Up Configuration Settings Dram PCI1 DLLPCI0 DLL MII/GMII GMII/PCSDram PLL N TBD BADR0Flash Memory Real-Time Clock and NvramTwo-Wire Serial Interface M48T37V AccessDDR Dram Serial Presence Detect I2C Bus Device AddressingDevice Address Device Function Size A2A1A0 AddressVPD and User Configuration EEPROMs Temperature SensorMV64360 Initialization MV64360 Device Controller Bank AssignmentsMPC Bus and PCI Bus Arbitration PCI Bus 0 and PCI Bus 1 Local BusesPCI Mode/Frequency Selection Device Bank AssignmentsIdsel Mapping for PCI Devices PCI Configuration SpaceIdsel AD20 PCI Arbitration Assignments for MV64360 Asic PCI Bus 1 Local Bus PMC Expansion SlotsPCI Arbitration Assignments for MV64360 MPP Pin Assignment PCI MastersPCI Bus 0 Local Bus Devices PCI Bus 1 Local Bus PMC Expansion SlotsMV64360 Interrupt Assignments MV64360 Interrupt ControllerGroup MV64360 Edge/Level Polarity Interrupt Source PCI-PMC 0 INTC#, PMC INTA# PCI-PMC 0 INTD#, PMC INTB#MV64360 Endian Issues DS1621 Digital Thermometer and Thermostat providesTable A-1. Motorola Computer Group Documents Motorola Computer Group DocumentsDocument Title Motorola Publication Number Manufacturers’ Documents Table A-2. Manufacturers’ DocumentsDocument Title and Source Publication Number MPC7457EC/DManufacturers’ Documents Table A-2. Manufacturers’ Documents Related Specifications Table A-3. Related SpecificationsIndex