Emerson MVME6100 manual PCI0 DLL, Mii/Gmii Gmii/Pcs, Dram PLL N TBD, BADR0, BADR1, Hikvco BADR2

Page 40

 

 

 

 

 

 

MV64360 Reset Configuration

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 2-2. MV64360 Power-Up Configuration Settings (continued)

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Device

 

Default

 

 

 

 

 

 

 

AD Bus

Select

Power-Up

 

 

 

 

 

 

 

Signal

Option

Setting

Description

State of Bit vs. Function

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AD[31:29]

Resistors

101

PCI_0 DLL

000

DLL disable

 

 

 

 

 

 

 

control

 

 

 

 

 

 

 

 

 

001

Conventional PCI mode at

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

66MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

101

PCI-X mode at 133 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

110

PCI-X mode at 66 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TxD0[0]

Resistor

0

Gigabit port 0

0

MII/GMII

 

 

 

 

 

 

 

GMII/PCS

 

 

 

 

 

 

 

 

 

1

PCS

 

 

 

 

 

 

 

Select

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TxD1[0]

Resistor

0

Gigabit port 1

0

MII/GMII

 

 

 

 

 

 

 

GMII/PCS

 

 

 

 

 

 

 

 

 

1

PCS

 

 

 

 

 

 

 

Select

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE[3:0],

Resistor

X

DRAM PLL N

TBD

Refer to MV64360

 

 

 

 

DP[3:0]

 

 

Divider [7:4],

 

Specification MV-S100614-

 

 

 

 

 

 

 

[3:0]

 

00 Rev. B (1/13/2003) page

 

 

 

 

 

 

 

 

 

144 for detail. MVME6100

 

 

 

 

 

 

 

 

 

is not using this mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BADR[0]

Resistor

1

DRAM PLL

1

Pull up NP

 

 

 

 

 

 

 

NP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BADR[1]

Resistor

1

DRAM PLL

1

Pull down HIKVCO

 

 

 

 

 

 

 

HIKVCO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BADR[2]

Resistor

1

DRAM PLL

0

PLL power down

 

 

 

 

 

 

 

NP

 

(normal operation)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

PLL power up

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TxD0[6:1]

Resistor

X

DRAM PLL M

TBD

Refer to MV64360

 

 

 

 

 

 

 

Divider

 

Specification MV-S100614-

 

 

 

 

 

 

 

 

 

00 Rev. B (1/13/2003) page

 

 

 

 

 

 

 

 

 

144 for detail. MVME6100

 

 

 

 

 

 

 

 

 

is not using this mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.motorola.com/computer/literature

2-7

Image 40
Contents Programmer’s Reference Guide MVME6100 Single-Board ComputerPage Safety Summary Ground the InstrumentFlammability Lithium Battery CautionEMI Caution CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables About This Guide Model Number DescriptionOverview of Contents Comments and SuggestionsConventions Used in This Manual BoldIntroduction OverviewFeature Description MVME6100 Features SummaryNvram PCI/PMC MVME6100 Board Layout Diagram Default Processor Memory Map Default Processor Address MapMemory Maps Processor Address Start End Size Definition29FF Ffff 41FF FfffF0FF Ffff F100 FfffMOTLoad’s Processor Memory Map MOTLoad’s Processor Address MapDefault PCI Address Map Default PCI Memory MapPCI Address Start End Size Definition MOTLoad’s PCI Memory Maps VME Memory MapSystem I/O Memory Map MOTLoad’s PCI Memory MapsDevice Bank 1 I/O Memory Map Address DefinitionM48T37V NVRAM/RTC COM 1 UartSystem Status Register System Status RegisterRefclk BankselAbortl FlashbsylFusestat SrominitBdfail EepromwpFlashawp System Status Register 2- 0xF1100001Fbootbwp FbootbwphdrTstatmask FbawphdrReset Board Rsvd BoardresetSystem Status Register 3- 0xF1100002 Presence Detect Register 10. Presence Detect RegisterIpmcprsnt EREADY1Configuration Header/Switch Register S1 11. Configuration Header/Switch RegisterPcieprsntl PMC0PL3 4 5 6 7 Time Base Enable Register Quad Universal Asynchronous Receiver/Transmitter Uart12. Tben Register TBEN0Real-Time Clock and Nvram 13. M48T37V AccessAddress Offset Function 0xF1110000 MV64360 Multi-Purpose Port Configuration Programming DetailsMV64360 MPP Pin Function Assignments MPP Pin Input Number Output FunctionMV64360 Reset Configuration MV64360 Power-Up Configuration Settings SromMV64360 Power-Up Configuration Settings Dram PCI1 DLLPCI0 DLL MII/GMII GMII/PCSDram PLL N TBD BADR0Flash Memory Real-Time Clock and NvramTwo-Wire Serial Interface M48T37V AccessDDR Dram Serial Presence Detect I2C Bus Device AddressingDevice Address Device Function Size A2A1A0 AddressVPD and User Configuration EEPROMs Temperature SensorMV64360 Initialization MV64360 Device Controller Bank AssignmentsMPC Bus and PCI Bus Arbitration PCI Bus 0 and PCI Bus 1 Local BusesPCI Mode/Frequency Selection Device Bank AssignmentsIdsel Mapping for PCI Devices PCI Configuration SpaceIdsel AD20 PCI Arbitration Assignments for MV64360 Asic PCI Bus 1 Local Bus PMC Expansion SlotsPCI Arbitration Assignments for MV64360 MPP Pin Assignment PCI MastersPCI Bus 0 Local Bus Devices PCI Bus 1 Local Bus PMC Expansion SlotsMV64360 Interrupt Assignments MV64360 Interrupt ControllerGroup MV64360 Edge/Level Polarity Interrupt Source PCI-PMC 0 INTC#, PMC INTA# PCI-PMC 0 INTD#, PMC INTB#MV64360 Endian Issues DS1621 Digital Thermometer and Thermostat providesTable A-1. Motorola Computer Group Documents Motorola Computer Group DocumentsDocument Title Motorola Publication Number Manufacturers’ Documents Table A-2. Manufacturers’ DocumentsDocument Title and Source Publication Number MPC7457EC/DManufacturers’ Documents Table A-2. Manufacturers’ Documents Related Specifications Table A-3. Related SpecificationsIndex