Emerson manual MVME6100 Board Layout Diagram

Page 17

1

Board Description and Memory Maps

J42

J7

J8

J29

PCI MEZZANINE CARD

PCI MEZZANINE CARD

U11

U10

U9

U8

U7

U6

U5

U17

U19

U16

 

U27

 

U25

U22

U23

 

U15

 

U14

 

U21

U30

U18

 

U13

 

U20

 

J21 J22

J23 J24

J11 J12

PMC

IPMC

J13 J14

P1

J3

J30

10/100/1000

 

 

 

 

 

LAN 1

 

 

 

 

 

 

 

 

 

 

10/100/1000

 

 

 

 

 

LAN 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DEBUG

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ABT/RST

J9

J93

J19

U1

U4

U3

U12

J4

U32

P2

 

4248 0504

Figure 1-1. MVME6100 Board Layout Diagram

1-4

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Image 17
Contents MVME6100 Single-Board Computer Programmer’s Reference GuidePage Ground the Instrument Safety SummaryEMI Caution Lithium Battery CautionFlammability CE Notice European Community Limited and Restricted Rights Legend Contents Appendix a List of Figures List of Tables Model Number Description About This GuideComments and Suggestions Overview of ContentsBold Conventions Used in This ManualOverview IntroductionNvram MVME6100 Features SummaryFeature Description PCI/PMC MVME6100 Board Layout Diagram Default Processor Address Map Default Processor Memory MapMemory Maps Processor Address Start End Size Definition41FF Ffff 29FF FfffF0FF Ffff F100 FfffMOTLoad’s Processor Address Map MOTLoad’s Processor Memory MapPCI Address Start End Size Definition Default PCI Memory MapDefault PCI Address Map VME Memory Map MOTLoad’s PCI Memory MapsSystem I/O Memory Map MOTLoad’s PCI Memory MapsAddress Definition Device Bank 1 I/O Memory MapM48T37V NVRAM/RTC COM 1 UartSystem Status Register System Status RegisterRefclk BankselFlashbsyl AbortlFusestat SrominitEepromwp BdfailFlashawp System Status Register 2- 0xF1100001Fbootbwphdr FbootbwpTstatmask FbawphdrSystem Status Register 3- 0xF1100002 BoardresetReset Board Rsvd 10. Presence Detect Register Presence Detect RegisterIpmcprsnt EREADY111. Configuration Header/Switch Register Configuration Header/Switch Register S1Pcieprsntl PMC0PL3 4 5 6 7 Quad Universal Asynchronous Receiver/Transmitter Uart Time Base Enable Register12. Tben Register TBEN0Address Offset Function 0xF1110000 13. M48T37V AccessReal-Time Clock and Nvram Programming Details MV64360 Multi-Purpose Port ConfigurationMPP Pin Input Number Output Function MV64360 MPP Pin Function AssignmentsMV64360 Reset Configuration Srom MV64360 Power-Up Configuration SettingsMV64360 Power-Up Configuration Settings PCI1 DLL DramMII/GMII GMII/PCS PCI0 DLLDram PLL N TBD BADR0Real-Time Clock and Nvram Flash MemoryM48T37V Access Two-Wire Serial InterfaceI2C Bus Device Addressing DDR Dram Serial Presence DetectDevice Address Device Function Size A2A1A0 AddressTemperature Sensor VPD and User Configuration EEPROMsMV64360 Initialization MV64360 Device Controller Bank AssignmentsPCI Bus 0 and PCI Bus 1 Local Buses MPC Bus and PCI Bus ArbitrationPCI Mode/Frequency Selection Device Bank AssignmentsIdsel AD20 PCI Configuration SpaceIdsel Mapping for PCI Devices PCI Bus 1 Local Bus PMC Expansion Slots PCI Arbitration Assignments for MV64360 AsicPCI Arbitration Assignments for MV64360 MPP Pin Assignment PCI MastersPCI Bus 1 Local Bus PMC Expansion Slots PCI Bus 0 Local Bus DevicesGroup MV64360 Edge/Level Polarity Interrupt Source MV64360 Interrupt ControllerMV64360 Interrupt Assignments PCI-PMC 0 INTD#, PMC INTB# PCI-PMC 0 INTC#, PMC INTA#DS1621 Digital Thermometer and Thermostat provides MV64360 Endian IssuesDocument Title Motorola Publication Number Motorola Computer Group DocumentsTable A-1. Motorola Computer Group Documents Table A-2. Manufacturers’ Documents Manufacturers’ DocumentsDocument Title and Source Publication Number MPC7457EC/DManufacturers’ Documents Table A-2. Manufacturers’ Documents Table A-3. Related Specifications Related SpecificationsIndex