Sony 4-216-840-0 Ader, Byte, Cnvss, Down, Beep OUT, L3-CLOCK, Flcs, Flclk, Da Rst

Page 34

•MAIN BOARD IC501 M30620MC-400FP (SYSTEM CONTROLLER)

Pin No.

Pin Name

I/O

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

1, 2

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

3

 

C1

O

Monitor output terminal for the test

C1 error rate is output when test mode

 

 

 

 

 

 

 

4

 

ADER

O

Monitor output terminal for the test

ADER is output when test mode

 

 

 

 

 

 

5

 

SQSY

I

Subcode Q sync (SCOR) input from the CXD2654R (IC121)

 

“L” is input every 13.3 msec

Almost all, “H” is input

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

RMC

I

Remote control signal input from the remote control receiver (IC781)

 

 

 

 

 

 

 

7

 

A1 IN

I

Sircs remote control signal input of the CONTROL A1

Not used

 

 

 

 

 

 

 

8

 

BYTE

I

External data bus line byte selection signal input

“L”: 16 bit, “H”: 8 bit (fixed at “L”)

 

 

 

 

 

 

 

 

 

 

9

 

CNVSS

—

Ground terminal

 

 

 

 

 

 

 

 

 

 

 

10

 

XT-IN

I

Sub system clock input terminal (32.768 kHz)

Not used (fixed at “L”)

 

 

 

 

 

 

 

11

 

XT-OUT

O

Sub system clock output terminal (32.768 kHz)

Not used (open)

 

 

 

 

 

 

12

 

S.RST

I

System reset signal input from the reset signal generator (IC406) “L”: reset

 

For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

 

 

 

 

 

 

 

 

 

 

 

 

13

 

XOUT

O

Main system clock output terminal (10 MHz)

 

 

 

 

 

 

 

 

 

 

 

14

 

GND

—

Ground terminal

 

 

 

 

 

 

 

 

 

 

 

15

 

XIN

I

Main system clock input terminal (10 MHz)

 

 

 

 

 

 

 

 

 

 

 

16

 

+3.3V

—

Power supply terminal (+3.3V)

 

 

 

 

 

 

 

 

 

17

 

NMI

I

Non-maskable interrupt input terminal (fixed at “H” in this set)

 

 

 

 

 

 

18

 

DQSY

I

Digital In U-bit CD format subcode Q sync (SCOR) input from the CXD2654R (IC121)

 

“L” is input every 13.3 msec

Almost all, “H” is input

 

 

 

 

 

 

 

 

 

 

 

 

19

 

P.DOWN

I

Power down detection signal input terminal “L”: power down, normally: “H”

 

 

 

 

 

 

 

 

20

KEYBOARD CLK

I

Not used (open)

 

 

 

 

21

KEYBOARD DATA

I

Not used (open)

 

 

 

 

 

 

 

 

22

BEEP OUT

O

Beep sound drive signal output terminal Not used (open)

 

 

 

 

 

 

23

 

XINT

I

Interrupt status input from the CXD2654R (IC121)

 

 

 

 

 

 

 

 

 

 

24 to 27

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

28

L3-CLOCK

O

Serial data transfer clock signal output to the A/D, D/A converter (IC301)

 

 

 

 

 

 

 

 

 

29

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

30

L3-DATA

O

Serial data output to the A/D, D/A converter (IC301)

 

 

 

 

 

 

 

 

31

 

SWDT

O

Writing data output to the CXD2654R (IC121)

 

 

 

 

 

 

 

 

32

 

SRDT

I

Reading data input from the CXD2654R (IC121)

 

 

 

 

 

 

 

33

 

SCLK

O

Serial clock signal output to the CXD2654R (IC121)

 

 

 

 

 

 

 

34

 

FLCS

O

Chip select signal output to the FL/LED driver (IC761)

 

 

 

 

 

 

 

 

35

 

FLDATA

O

Serial data output to the FL/LED driver (IC761)

 

 

 

 

 

 

 

 

 

 

 

36

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

37

 

FLCLK

O

Serial data transfer clock signal output to the FL/LED driver (IC761)

 

 

 

 

 

 

 

 

 

38 to 40

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

41

 

NC

I

Not used (fixed at “L”)

 

 

 

 

 

 

 

 

 

42

 

JOG1

I

JOG dial pulse input from the rotary encoder (S713 = AMS +) (B phase input)

 

 

 

 

 

43

 

JOG0

I

JOG dial pulse input from the rotary encoder (S713 = AMS +) (A phase input)

44

 

NC

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

45

 

A1 OUT

O

Sircs remote control signal output of the CONTROL A1

Not used

 

 

 

 

 

 

 

 

 

46

 

NC

I

Not used (fixed at “L”)

 

 

 

 

 

 

 

 

47

L3-MODE

O

L3 mode control signal output to the A/D, D/A converter (IC301)

 

 

 

 

 

 

 

48

 

DA RST

O

Reset signal output for the A/D, D/A converter

“L”: reset Not used (open)

 

 

 

 

 

 

49

 

MUTE

O

Audio line muting on/off control signal output terminal

“L”: line muting on

 

 

 

 

 

 

 

 

 

 

– 34 –

Page 33 Page 35
Image 34
Page 33 Page 35
Contents MDS-JE520 SpecificationsMDM-5A SELF-DIAGNOSIS Function Items of Error History Mode Items and Contents Diagrams Table of ContentsSection Servicing Notes Flexible Circuit Board Repairing VarningJIG for Checking BD Board Waveform IOPRecord Precedure Checks Prior to Parts Replacement and Adjustments Criteria for Determination Measure if unsatisfactoryRetry Cause Display Mode PrecedureHexadecimal nBinary Conversion Table Section General Cover Section DisassemblyFront Panel Section Main Board Mechanism Deck Section MDM-5ASlider CAM Base Unit MBU-5A, BD BoardSW BOARD, Loading Motor M103 Setting the Test Mode Section Test ModePrecautions for USE of Test Mode Exiting the Test ModeSelecting the Test Mode Display Contents Mark GroupMID Operating the Continuous Playback ModeNon-Volatile Memory Mode EEP Mode OUTTest Mode Displays Functions of Other ButtonsMeanings of Other Displays Section Electrical Adjustments Parts Replacement and AdjustmentPrecautions for Adjustments Precautions for Checking Laser Diode EmissionPrecautions for USE of Optical PICK-UP KMS-260A Laser power meterCheck Prior to Repairs Temperature Compensation Offset CheckLaser Power Check Traverse CheckFocus Bias Check Play Checking MO Error Rate CheckCD Error Rate Check Self-Recording/playback CheckLaser Power Adjustment Initial Setting of Adjustment ValueTemperature Compensation Offset Adjustment Recording and Displaying the IOP InformationTraverse Adjustment Focus Bias Adjustment ING CONTINUOUSLY-RECORDED DiscCD Auto Gain Control Output Level Adjustment Error Rate CheckAuto Gain Control Output Level Adjustment MO Auto Gain Control Output Level AdjustmentAdjustment Location Section Diagrams IC PIN Function DescriptionSrdt MNT2 XbusyXlat SensAsyo XrasXWE AsyiSfdr FS4Srdr SprdCnvss AderByte RSTLdin STBChack LD-LOWPlay Analog OUT Block Diagram MD Servo Section∙ Signal Path REC Analog REC DigitalBlock Diagram Main Section REC AnalogCircuit Boards Location CNDSemiconductor Location MDS-M100 Schematic Diagram BD Board 2/2 See 65 for Waveforms. See page 51 for IC Block DiagramSchematic Diagram SW Board Printed Wiring Board SW BoardIC406 M62016L IC421 M5293L IC121 CXD2654RMain Board IC301 ΜDA1341TS/N2 IC152 BH6511FS-E2MDS-M100 Semiconductor Location Schematic Diagram Main Board 1/2 See page 65 for Waveform MDS-M100 Ref. No Location D741 D742 IC761 Q741 Q742 Q767 MDS-M100 Exploded Views SectionCover Section Chassis Section AEP, SP209 4-988-466-11 Spring ELECTROSTATIC, Leaf Mechanism Section MDM-5A201 206 204 205 221 A-4680-409-A Holder Complete AssyBase Unit Section MBU-5A Section Electrical Parts List AC Select BDCXA2523AR Short SwitchIC/TRANSISTOR Transistor FMW1Main ConnectorCeramic Carbon InductorExcept US, CND Main Panel Panel SW Trans Sony Corporation
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