Icom IC-FR3000 manual Transmitter Circuits, Receiver Mute Circuits Logic Unit, MIC Mute

Page 9

3-1-6 RECEIVER MUTE CIRCUITS (LOGIC UNIT)

• NOISE SQUELCH

The noise squelch circuit cuts out AF signals when no RF signals are received. By detecting noise components in the AF signals, the squelch circuit switches the AF mute switch.

Some noise components in the AF signals from the FM IF IC (RX unit; IC2, pin 9) are passed through the SQL level con- troller (VR unit; R2). The level controlled signals are applied to the active filter section in the FM IF IC (RX unit; IC2, pin 8). Noise components about 10 kHz are amplified and out- put from pin 7 (RX unit; IC2).

The filtered signals are converted to the pulse-type signals at the noise detector section and output from pin 13 (RX unit; IC2).

The NDET signal from the FM IF IC (RX unit; IC2) is applied to the CPU (IC33, pin 40). The CPU analyses the noise con- dition and controls the AF mute signal via “AFMUTE1” line (IC40, pin 4) to the AF mute switch (IC16, pin 5).

nal is applied to the CPU (IC 33) via the serial signal line.

The DTCS signal passes through a low-pass filter circuit (IC12, pins 1, 3, 8, 10), and is then applied to the signal amplifier (IC12, pins 12, 14). the amplified signal is applied to the DTCS decoder which is inside the CPU (IC33, pin 52) via the “DTCSI” line.

The 2/5TONE signals are passes through a low-pass filter circuit (IC12, pins 5, 7), and are then applied to the 2/5 TONE decoder which is inside the CPU (IC33, pin 51) via “25TI” line.

The DTMF signal is pass through the DTMF switch IC (IC30 pin 7), and is then applied to the DTMF decoder(IC31). The decoded signal is applied to the CPU (IC33, pins 82, 85, 86). The CPU analyzes the DTMF signal.

The DTMF switch (IC30) selects the signal from telephone line or RX unit.

• TONE SIGNALS

The tone squelch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (CTCSS or DTCS).

The CTCSS signal passes through a low-pass filter circuit (IC8, pins 1, 3, 5, 7, 8, 10), and is then applied to the signal amplifier (IC8, pins 13, 14). The amplified signal is applied to the CTCSS decoder IC (IC29, pin 16) and the detected sig-

3-2 TRANSMITTER CIRCUITS

3-2-1 AF AMPLIFIER CIRCUIT (LOGIC UNIT)

IN CASE OF THE AF SIGNALS FROM THE MIC JACK The AF signals from the MIC jack (FRONT unit; J7) are amplified at the AF amplifier (IC1). The amplified signals are mixed with the “E_MOD1”, “E_MOD2” and “TELAFO” sig- nals at IC2. The mixed signals pass though the high-pass fil- ter (IC2, pins 1, 2, 6, 7) via the pre-emphasis circuit (IC2, pins 8, 9).

TONE SIGNALS CIRCUITS (LOGIC UNIT)

DISC signal from RX unit

AMP

IC9

CTCSS

LPF AMP

CTCSS

DETECTOR

BUS

To the AF amplifier

IC29

DTCS

IC8 IC8

LPF AMP

DATA

DTCSI

CPU; IC33

IC12 IC12

2/5TONE

LPF

 

 

25TI

 

IC12

DTMF DTMF

SW

IC30

DTMF

DECODER

IC31

DATA BUS

AF AMPLIFIER CIRCUITS (LOGIC UNIT)

From the FRONT

 

MIC

AMP

 

 

SW-D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

unit

 

 

 

 

 

 

 

 

MIX

PRE

HPF

LIMIT

SIG

SPLAT To TX unit

 

 

 

 

 

 

 

 

 

EMP

MIX

FIL

From the REMOTE

 

E_MOD

 

 

 

SW-C

 

 

 

 

 

 

 

AMP

 

 

 

 

IC2

 

 

IC3

IC3

IC4

connector

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

From the telephone

 

TELAFO

 

 

 

 

 

 

RPT AF signal AFATTO RPT AF

 

 

circuit

 

 

AMP

 

SW-B

 

 

from IC25

 

 

MUTE IC14

 

 

From the ACC

E_MODE2 AMP

 

 

 

 

From the REMOTE

E_MOD3

AMP

 

 

connector

 

SW-A

 

 

connector

 

 

 

 

 

 

 

 

 

 

IC26

 

 

 

 

 

 

 

 

 

 

 

 

25TONE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BEEP

 

LPF

 

 

 

 

 

 

 

IC13

 

 

 

 

 

 

 

 

 

 

 

CW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MIC MUTE

 

 

DTMF

 

 

 

 

From CPU (IC33)

3 - 2

Image 9
Contents IC-fr3000 iC-fr3 1 0 Introduction Ordering PartsRepair Notes Table of Contents General SpecificationsPA Unit Board LayoutBottom view Logic UnitRX Unit TX UnitRF Circuit RX Unit Receiver Circuits2 1ST Mixer and 1ST if Circuits RX Unit 3 2ND if and Demodulator Circuits RX UnitTransmitter Circuits Receiver Mute Circuits Logic UnitMIC Mute Case of the Dtmf Signals from Dialer IC Case of the 2/5TONE SignalsCase of the Ctcss and Dtcs Signals From the CPU Power Amplifier Circuit PA UnitPLL Circuits Other Circuits Power Supply CircuitsExpander IC Logic Unit IC39 Port AllocationsExpander IC Logic Unit IC40 Expander IC Logic Unit IC415 D/A Converter IC TX Unit IC5 TEL DtcsiBusy MCKPreparation Battery RXRequired Test Equipment MICProcess to the Permit Adjustment Mode Access Before Entering the Adjustment ModeOperating in the Adjustment Mode Entering the Adjustment ModeExiting the Adjustment Mode After Finishing AdjustmentExplanation of LCD Display in the Adjustment Mode Adjustment Mode CH ListWide NarrowIC-FR3000 TOP View PLL AdjustmentTX Unit TOP View RX Unit TOP View CP2 CP4Software Adjustment Output PowerLOW DeviationDtcs CtcssREG Unit Section Parts ListLogic Unit Front UnitBridge Resistor ERJ12YJ390U ECEV1CA100SR ECEV1CA220SR Tantalum Teesva 1V 104M8L RX Unit Tantalum Teesva 1V 224M8L Rvco Unit TX Unit Tvco Unit PA Unit JACK1 Unit VR UnitChassis Unit JACK2 UnitOption Unit Installation Duplexer and isolater installation Example 2 Duplexer Connection Connection Example 1 Isolater ConnectionExample 3 Duplexer and Isolater Connection ISO Isolater DUP DuplexerMechanical Parts and Disassembly Front Unit REG Unit Rvco Unit Transistors and Fets SEMI-CONDUCTOR InformationDiodes Tvco Unit Rvco Unit Front Unit¡BOTTOM View Rvco Unit Tvco Unit VR UnitBoard Logic UnitGND TMUTE1 Txaf Tone TMUTE2 Patemp Rvswr Fwswr RX Unit RX Unit TX Unit TX Unit PA Unit PA Unit REG Unit REG Unit JACK2 UnitJACK1 Unit Block Diagram PA Unit Wiring Diagram Section Voltage Diagram Rvco Unit TX Unit PA Unit Unit Logic Unit Chassis Unit Icom New Zealand 32, Kamiminami, Hirano-ku, Osaka, 547-0003, Japan