Performance Characteristics (continued)
Vertical System: Digital Channels (54621D, 54622D, 54641D, and 54642D only)
Number of Channels | 16 Digital – labeled D15 - D0 |
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Threshold Groupings | Pod 1: D7 - D0 |
| Pod 2: D15 - D8 |
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Threshold Selections | TTL, CMOS, ECL, |
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±8.0 V in 10 mV increments | |
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Maximum Input Voltage | ±40 V peak CAT I |
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Threshold Accuracy* | ±(100 mV + 3% of threshold setting) |
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Input Dynamic Range | ±10 V about threshold |
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Minimum Input Voltage Swing | 500 mV |
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Input Capacitance | ~ 8 pF |
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Input Resistance | 100 kΩ ±2% at probe tip |
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2 ns typical, 3 ns maximum | |
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Horizontal |
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Range | 54621A/D, 54622A/D, 54624A: 5 ns/div to 50 s/div |
| 54641A/D, 54642A/D: 1 ns/div to 50 s/div |
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Resolution | 54621A/D, 54622A/D, 54624A: 25 ps |
| 54641A/D, 54642A/D: 2.5 ps |
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Vernier | |
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Reference Positions | Left, Center, Right |
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Delay Range | 54621A/D, 54622A/D, 54624A: |
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| 54641A/D, 54642A/D: |
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Analog | 54621A/D, 54622A/D, 54624A: |
| Same Channel*: ±0.01% reading ±0.1% screen width ±40 ps |
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| 54641A/D, 54642A/D: |
| Same Channel*: ±0.005% reading ±0.1% screen width ±20 ps |
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| Same Channel Example (54641A/D, 54642A/D): |
| for signal with pulse width of 10 µs, scope set to 5 µs/div (50 µs screen width), |
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* Denotes Warranted Specifications, all others are typical. Specifications are valid after a
15