![](/images/new-backgrounds/1058433/5843341x1.webp)
F i n i s a r |
1Calibration Constants
2 |
| TABLE 3.15: Calibration constants for External Calibration Option | ||
3 |
| |||
4 |
|
|
| (2 Wire Address A2h) |
5 |
|
|
|
|
| Address | # Bytes | Name | Description |
|
|
|
|
|
| 4 | Rx_PWR(4) | Single precision floating point calibration data - Rx optical power. Bit | |
|
|
|
| 7 of byte 56 is MSB. Bit 0 of byte 59 is LSB. Rx_PWR(4) is set to |
|
|
|
| zero for “internally calibrated” devices. |
|
|
|
|
|
| 4 | Rx_PWR(3) | Single precision floating point calibration data - Rx optical power. | |
|
|
|
| Bit 7 of byte 60 is MSB. Bit 0 of byte 63 is LSB. Rx_PWR(3) is set to |
|
|
|
| zero for “internally calibrated” devices. |
| 4 | Rx_PWR(2) | Single precision floating point calibration data, Rx optical power. | |
|
|
|
| Bit 7 of byte 64 is MSB, bit 0 of byte 67 is LSB. Rx_PWR(2) is set to |
|
|
|
| zero for “internally calibrated” devices. |
| 4 | Rx_PWR(1) | Single precision floating point calibration data, Rx optical power. Bit 7 | |
|
|
|
| of byte 68 is MSB, bit 0 of byte 71 is LSB. Rx_PWR(1) is set to 1 for |
|
|
|
| “internally calibrated” devices. |
| 4 | Rx_PWR(0) | Single precision floating point calibration data, Rx optical power. Bit 7 | |
|
|
|
| of byte 72 is MSB, bit 0 of byte 75 is LSB. Rx_PWR(0) is set to zero |
|
|
|
| for “internally calibrated” devices. |
|
|
|
|
|
| 2 | Tx_I(Slope) | Fixed decimal (unsigned) calibration data, laser bias current. Bit 7 of | |
|
|
|
| byte 76 is MSB, bit 0 of byte 77 is LSB. Tx_I(Slope) is set to 1 for |
|
|
|
| “internally calibrated” devices. |
| 2 | Tx_I(Offset) | Fixed decimal (signed two’s complement) calibration data, laser bias | |
|
|
|
| current. Bit 7 of byte 78 is MSB, bit 0 of byte 79 is LSB. Tx_I(Offset) |
|
|
|
| is set to zero for “internally calibrated” devices. |
| 2 | Tx_PWR(Slope) | Fixed decimal (unsigned) calibration data, transmitter coupled output | |
|
|
|
| power. Bit 7 of byte 80 is MSB, bit 0 of byte 81 is LSB. |
|
|
|
| Tx_PWR(Slope) is set to 1 for “internally calibrated” devices. |
|
|
|
|
|
| 2 | Tx_PWR(Offset) | Fixed decimal (signed two’s complement) calibration data, | |
|
|
|
| transmitter coupled output power. Bit 7 of byte 82 is MSB, bit 0 of |
|
|
|
| byte 83 is LSB. Tx_PWR(Offset) is set to zero for “internally |
|
|
|
| calibrated” devices. |
| 2 | T (Slope) | Fixed decimal (unsigned) calibration data, internal module | |
|
|
|
| temperature. Bit 7 of byte 84 is MSB, bit 0 of byte 85 is LSB. |
|
|
|
| T(Slope) is set to 1 for “internally calibrated” devices. |
| 2 | T (Offset) | Fixed decimal (signed two’s complement) calibration data, internal | |
|
|
|
| module temperature. Bit 7 of byte 86 is MSB, bit 0 of byte 87 is LSB. |
|
|
|
| T(Offset) is set to zero for “internally calibrated” devices. |
|
|
|
|
|
| 2 | V (Slope) | Fixed decimal (unsigned) calibration data, internal module supply | |
|
|
|
| voltage. Bit 7 of byte 88 is MSB, bit 0 of byte 89 is LSB. V(Slope) is |
|
|
|
| set to 1 for “internally calibrated” devices. |
| 2 | V (Offset) | Fixed decimal (signed two’s complement) calibration data, internal | |
|
|
|
| module supply voltage. Bit 7 of byte 90 is MSB. Bit 0 of byte 91 is |
|
|
|
| LSB. V(Offset) is set to zero for “internally calibrated” devices. |
| 3 | Reserved | Reserved | |
6 | 95 | 1 | Checksum | Byte 95 contains the low order 8 bits of the sum of bytes 0 – 94. |
|
|
|
| |
|
|
|
| |
7 |
|
|
|
|
8 |
|
|
|
|
9/26/02 Revision D | Page 21 |