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Headphone Connector (J700)
2
1
(PCBconnectortopview)
Figure 2-4. J101 . . . J107 Pin Numbers
Table 2-5. J101 . . . J107 Pin Description
PIN NO. | DESCRIPTION | |
1 | Speaker negative output | |
2 | Speaker positive output |
2.4Headphone Connector (J700)
2
1
3
4
Figure 2-5. J700 Pin Numbers
Table 2-6. J700 Pin Description
PIN NO. | DESCRIPTION | |
1 | Right headphone output | |
2 | GND | Ground |
3 | — | For future use |
4 | Left headphone output |
2.5Control Interface (J40)
This interface connects the
Table 2-7. J40 Pin Description
PIN NO. | DESCRIPTION |
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1 | GND | Ground |
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2 | RESERVED | — |
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3 | GND | Ground |
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4 | RESET | System reset (bidirectional). Activate |
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| MUTE before RESET for quiet reset. |
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5 | Backend error (or soft reset) provides |
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| reduced click and pop reset, without |
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| resetting I2C volume register settings. |
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6 | MUTE | Ramp volume from any setting to |
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| noiseless soft mute. Mute can also be |
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| activated by I2C. |
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7 | PDN | Power down. TAS5508B will go to |
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8 | RESERVED | — |
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9 | RESERVED | — |
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10 | SDA | I2C data clock |
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SLEU071 |
| System Interfaces | 11 |
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