Texas Instruments
TAS5508-5142K7EVM
manual
SLEU071 -June2006, Submit Documentation Feedback
Net-Nameat Schematics
3.2Fault Reporting
Power Output Stage
1.1TAS5508-5142K7EVMFeatures
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SLEU071
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2006
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Contents
TAS5508-5142K7EVMUser’s Guide
Power Output Stage
Users Guide
June
SLEU071 -June2006
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Contents
Integrated PurePath Digital Amplifier System
Recommended Power-UpSequence
List of Figures
J901 and J900 Pin Numbers
Overview
Chapter
1.1TAS5508-5142K7EVMFeatures
Overview
1.2PCB Key Map
PCB Key Map
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SLEU071 -June2006
PCB Key Map
Overview
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Figure 2-1.Recommended Power-UpSequence
System Interfaces
2.1Power Supply PSU Interface J901 and J900
Chapter
Table 2-2.J901 Pin Description
2.3Loudspeaker Connectors J101 ¼ J107
2.2PSU Control Interface J902
Table 2-3.J900 Pin Description
NET-NAMEAT SCHEMATICS
2.4Headphone Connector J700
Headphone Connector J700
NET-NAMEAT SCHEMATICS
Control Interface J40
NET-NAMEAT SCHEMATICS
Table 2-7.J40 Pin Description continued
PIN NO
Table 2-8.J60 Pin Description
NET-NAMEAT SCHEMATICS
2.6Digital Audio Interface J60
Digital Audio Interface J60
SLEU071 -June2006
Digital Audio Interface J60
System Interfaces
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Table 3-1.TAS5142 Warning/Error Signal Decoding
Protection
3.2Fault Reporting
Chapter
SLEU071 -June2006
Fault Reporting
Protection
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4.1Trademarks
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Chapter
EVALUATION BOARD/KIT IMPORTANT NOTICE
FCC Warning
EVM WARNINGS AND RESTRICTIONS
Applications
IMPORTANT NOTICE
Products
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