Texas Instruments TAS5508-5142K7EVM manual 2.2PSU Control Interface J902, 2.J901 Pin Description

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Table 2-2. J901 Pin Description

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PSU Control Interface (J902)

Table 2-2. J901 Pin Description

PIN NO.

NET-NAME AT SCHEMATICS

DESCRIPTION

1

PVDD

Output-stage power supply

2

SYSTEM

System power supply

3

GND

Ground

4

GND

Ground

Table 2-3. J900 Pin Description

PIN NO.

NET-NAME AT SCHEMATICS

DESCRIPTION

1

PVDD

Extra output-stage power supply

2

PVDD

Extra output-stage power supply

3

GND

Extra ground

4

GND

Extra ground

2.2PSU Control Interface (J902)

This interface is used for onboard sensing of output supply voltage and for the power supply volume control (PSVC) signal.

5

4

3

2

1

(PCB￿connector￿top￿view)

Figure 2-3. J902 Pin Numbers

Table 2-4. J902 Pin Description

PIN NO.

NET-NAME AT SCHEMATICS

DESCRIPTION

1

Reserved for future use

2

PVDD

Sense of output power supply

3

GND

Ground

4

RESET

System reset (bidirectional)

5

PSVC

Power supply volume control signal

2.3Loudspeaker Connectors (J101 ¼ J107)

CAUTION

Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope).

10

System Interfaces

SLEU071 –June 2006

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Contents TAS5508-5142K7EVMUser’s Guide Power Output StageUsers Guide JuneSLEU071 -June2006 Submit Documentation FeedbackContents Integrated PurePath Digital Amplifier System Recommended Power-UpSequenceList of Figures J901 and J900 Pin NumbersOverview Chapter1.1TAS5508-5142K7EVMFeatures Overview 1.2PCB Key MapPCB Key Map Submit Documentation FeedbackSLEU071 -June2006 PCB Key MapOverview Submit Documentation FeedbackFigure 2-1.Recommended Power-UpSequence System Interfaces2.1Power Supply PSU Interface J901 and J900 ChapterTable 2-2.J901 Pin Description 2.3Loudspeaker Connectors J101 ¼ J1072.2PSU Control Interface J902 Table 2-3.J900 Pin DescriptionNET-NAMEAT SCHEMATICS 2.4Headphone Connector J700Headphone Connector J700 NET-NAMEAT SCHEMATICSControl Interface J40 NET-NAMEAT SCHEMATICSTable 2-7.J40 Pin Description continued PIN NOTable 2-8.J60 Pin Description NET-NAMEAT SCHEMATICS2.6Digital Audio Interface J60 Digital Audio Interface J60SLEU071 -June2006 Digital Audio Interface J60System Interfaces Submit Documentation FeedbackTable 3-1.TAS5142 Warning/Error Signal Decoding Protection3.2Fault Reporting ChapterSLEU071 -June2006 Fault ReportingProtection Submit Documentation FeedbackChapter Related Documentation From Texas Instruments4.1Trademarks EVALUATION BOARD/KIT IMPORTANT NOTICE FCC WarningEVM WARNINGS AND RESTRICTIONS Products IMPORTANT NOTICEApplications