VXI Technology, Inc.
TABLE 4-1: SMIP II REGISTER MAP - A16
OFFSET | WRITE FUNCTION |
3E | Trace Advance |
3C | Busy Trigger Control |
3A | Trace RAM Control |
38 | TTL Trigger Polarity |
36 | Open Trigger Select |
34 | Trace ADV Trigger Select |
32 | Trace RAM Address LOW |
30 | Trace RAM Address HIGH |
2E | Trace RAM End LOW |
2C | Trace RAM End HIGH |
2A | Trace RAM Start LOW |
28 | Trace RAM Start HIGH |
26 | Module 5, 4 Used Address |
24 | Module 3, 2 Used Address |
22 | Module 1, 0 Used Address |
20 | NVM Access Register |
1E | Reserved |
1C | Interrupt Control |
1A | Reserved |
18 | Reserved |
16 | Reserved |
14 | Reserved |
12 | Reserved |
10 | Reserved |
E | Reserved |
C | Reserved |
A | Reserved |
8 | Reserved |
6 | Offset Register |
4 | Control Register |
2 | Reserved |
0 | LA Register |
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READ FUNCTION
Board Busy
Busy Trigger Control
Trace RAM Control
Reserved
Reserved
Reserved
Trace RAM Address LOW
Trace RAM Address HIGH
Trace RAM End LOW
Trace RAM End HIGH
Trace RAM Start LOW
Trace RAM Start HIGH
Reserved
Reserved
Reserved
NVM Access Register
Subclass Register
Interrupt Control
Interrupt Status
Reserved
Reserved
Reserved
Reserved
Reserved
Version Number
Serial Number LOW
Serial Number HIGH
Reserved
Offset Register
Status Register
Device Type Register
ID Register
22 | SM7100 Programming |