VXI Microwave Matrix Offset Register 0x06 Read and Write, Reserved Register 0x0A Read Only

Page 24

VXI Technology, Inc.

Offset Register (0x06) — Read and Write

D15-D0

A24/A32 Memory

Offset

The value written to this 16-bit register, times 256, sets the base address of the A24 memory space used by the module. The value written to this 16-bit register, times 65,536, sets the base address of the A32 memory space used by the module. A read from this register reflects the previously written value. Because of the required memory size, bits D4 - D0 are disregarded on writes and always read back as 0. Upon receiving a hard reset, all bits in this register are set to 0. A soft reset does not affect the value in this register.

Reserved Register (0x0A) — Read Only

D15-D0

Not Implemented

Always read back as FFFF16

Reserved Register (0x0C) — Read Only

D15-D0

Not Implemented

Always read back as FFFF16

 

 

Version Number Register (0x0E) — Read Only

 

D15-D8

Firmware Version

Not applicable, reads back as 0016

 

Number

 

 

 

 

D7-D4

Major Hardware

Depends on the specific hardware revision of the SMIP II interface board.

 

Version Number

 

 

 

 

D3-D0

Minor Hardware

Depends on the specific hardware revision of the SMIP II interface board.

 

Version Number

 

 

 

Interrupt Status Register (0x1A) — Read Only

D15

Scan Function done

The latest scan list update is complete.

D14

Openbus Active Event

The Openbus was activated by one or more programmed inputs. See

true

description of the Openbus in the module register section.

 

D13-D9

Unused

Data written to these bits have no effect.

 

 

The programmed Busy signal from the module has timed out. This

D8

Module Busy Complete

indicates that the relays actuated for that Busy cycle have settled and a

 

 

measurement may take place.

D7-D0

Reserved

Always reads back as FFFF16

Note: This status register may be used in a polled fashion rather than allowing the events above to generate an Interrupt. A read of this register will clear any active bits. Bits that are not set, or are about to be set are not affected by a read of this register.

24

SM7100 Programming

Image 24
Contents SM7100 VXI Technology, Inc Table of Contents Warranty Limitation of WarrantyCertification Restricted Rights LegendC L a R a T I O N O F C O N F O R M I T Y EMCGeneral Safety Instructions Terms and SymbolsAvoid Electric Shock Support Resources Overview ProgrammingSM7100 Specifications VswrSMA Calculating System Power and Cooling Requirements Setting the Chassis Backplane JumpersIntroduction Setting the Logical Address MSB LSBSelecting the Extended Memory Space VXI Technology, Inc SM7100 Preparation for Use Switch Configuration Front Panel Connection SM7000EXT GNDReturn GND SM7100 Module Configuration SM7100 Matrix Schematic Offset Hex VXI Technology, Inc SM7100 Module Configuration Register Access AddressingSmip II Register MAP A16 Offset Write FunctionID Register 0x00 Read Only Logical Address Register 0x00 Write OnlyDevice Type Register 0x02 Read Only Status Register 0x04 Read OnlyOffset Register 0x06 Read and Write Reserved Register 0x0A Read OnlyReserved Register 0x0C Read Only Version Number Register 0x0E Read OnlyNVM Access Resister 0x20 Read Only NVM Access Resister 0x20 Write OnlyInterrupt Control Register 0x1C Read and Write Subclass Register 0x1E Read OnlyTrace RAM Start High Register 0x28 Read and Write Trace RAM Start Low Register 0x2A Read and WriteTrace RAM End High Register 0x2C Read and Write Trace RAM End Low Register 0x2E Read and WriteLoop Enable Trace EnableOpen Trigger Select Register 0x36 -Write Only TTL Trigger Polarity Register 0x38 -Write OnlyBusy Trigger Control Register 0x3C Read and Write Trigger Advance Register 0x3E Write OnlyBoard Busy Register 0x3E Read Only Reserved Registers Read and WriteAddr AcfailnBBM/MBB Control Register Read and Write Delay Register Read and Write Relay Register Offset Writing to the RelaysVIA16SPACE Index SM7100