Renesas M65881AFP manual Description, Features, Main Specification, Application

Page 1

M65881AFP

Digital Amplifier Processor of S-Master* Technology

REJ03F0004-0100Z Rev.1.00 2003.05.08

DESCRIPTION

The M65881AFP is a S-Master technique processor for digital amplifier enable to convert from multi liner-PCM digital input signal to high precise switching-pulse digital output without analog processing.

The M65881AFP has built-in 24bit sampling rate converter and digital-gain-controller.

The M65881AFP enables to realize high precise ( X`tal oscillation accuracy.) full digital amplifier systems combining with power driver IC.

FEATURES

•Built-in 24bit Sampling Rate Converter.

Input Signal Sampling Rate from 32KHz to 192KHz (24bit Maximum).

4 kinds of Digital Input Format.

•Built-in L/R Independent Digital Gain Control.

•Built-in Soft Mute Function with Exponential Approximate-Curve.

•Correspondence to Output for Headphone.

OUTLINE : 42P2R

0.8mm pitch 42pin SSOP

MAIN SPECIFICATION

•Master Clock

Primary Clock: 256Fsi/512Fsi Secondary Clock: 1024Fso/512Fso •Input Signal Format:

MSB First Right Justified(16/20/24bit),MSB First Left Justified(24bit) LSB First Right Justified(24bit),I2S(24bit)

•Input Signal Sampling Rate from 32kHz to 192kHz. •Gain Control Function:

+30dB~-dB (0.1dB Step until -96dB, -138dB Minimum) •Third Order ΔΣ (16Fso:6bit/5bit,32Fso:5bit)

APPLICATION

DVD Receiver, AV Amplifier

RECOMMENDED OPERATING CONDITIONS

Logic Block:1.8V±10%,PWM Buffer Block :3.3V±10%

SYSTEM BLOCK DIAGRAM)

M65881AFP

 

LRCK

 

24bit

Sampling

CD

 

 

 

 

 

 

 

 

 

 

Rate

DVD Audio

BCK

 

 

 

 

 

 

etc.

DATA

 

 

 

Converter

 

32kHz

 

 

 

 

 

 

 

 

 

to

 

 

 

192kHz

 

256fsi/512fsi

Clock

Level

 

Control

ΔΣ

+30dB

 

to

 

-

 

Clock

MCU I/F

PWM

Stream

LC

Power

Filter

Driver

 

Stream

LC

Power

Filter

Driver

 

Output

for Headphone

1024fso/512fso

* "S-Master" is the digital amplifier technology developed by Sony Corporation. "S-Master" is a trademark of Sony Corporation.

Rev.1.00 2003.05.08 page 1 of 23

Image 1
Contents Main Specification FeaturesSystem Block Diagram DescriptionPIN Configuration Lrck OUTR2 HPOUTL1 HPOUTL2 OUTL1 Data OUTL2HPOUTR2 Parameter Level Input Voltage Input Leek Current Absolute Maximum RatingsGND Characteristics Evaluation CircuitPIN Description DATA,BCK,LRCK Explanation of OperationMCKSEL, XfsoIN, XfsoOUT SCDT, SCSHIFT, SclatchScdt Scshift Sclatch FsoI, Sflag ASYNCEN2=enablePWM output control OUTL1, OUTL2, OUTR1, OUTR2NSPMUTEL,NSPMUTER H ChselHPOUTL1, HPOUTL2, HPOUTR1, HPOUTR2 Power supply and GNDInit TEST1, TEST2Init Scdt Scshift Sclatch Power sequences System power-on sequencingNSLMT1,2 Serial ControlMantissa Data decimal value 128 Characteristics of Soft Mute function MODE2 MODE1IFMT0 IFMT1 IBIT0Rev.1.00 System2 Mode Rev.1.00 AC Characteristics Timing Chart AC CharacteristicsApplication Example DSP MCUPackage DiagramM65881AFP