Renesas M65881AFP manual Dsp Mcu, Application Example

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M65881AFP

APPLICATION EXAMPLE

DSP

MCU

Initialize Control

Mute Control

Input Mode Select1 Input Mode Select2

			MCKSEL	Secondary Clock Select
LRCK			MCKSEL	L:1024Fso H:512Fso
BCK		XFSOIN
DATA		XFSOIN
DATA		(Secondary Clock)		Oscillator
XfsiIN		(Secondary Clock)
XfsiIN
(Primary Clock)			XFSOOUT	Secondary Clock output
			XFSOOUT	Secondary Clock output
			FsoCKO	Secondary synchronized clock (For Multi channel )
			FsoI	Secondary synchronized clock (For Multi channel )
			FsoI
SCDT
SCSHIFT			OUTL1	Power
SCLATCH			OUTL1
SCLATCH
			OUTL2	Driver
			OUTL2
M65881AFP
INIT			OUTR1	Power
NSPMUTE				Power
NSPMUTE			OUTR2	Driver
				Driver

MODE1			HPOUTL1
MODE1
MODE2 T	T	S	HPOUTL2	Low Pass Filter
E	E	F	HPOUTR1	/Headphone Amplifier
S	S	L	HPOUTR2
T	T	A	HPOUTR2
1	2	G

Flag Output

Rev.1.00 2003.05.08

page 21 of 23

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Contents Main Specification FeaturesSystem Block Diagram DescriptionPIN Configuration OUTL1 Data OUTL2 Lrck OUTR2 HPOUTL1 HPOUTL2HPOUTR2 Parameter Level Input Voltage Input Leek Current Absolute Maximum RatingsGND Characteristics Evaluation CircuitPIN Description DATA,BCK,LRCK Explanation of OperationSCDT, SCSHIFT, Sclatch MCKSEL, XfsoIN, XfsoOUTScdt Scshift Sclatch FsoI, Sflag ASYNCEN2=enablePWM output control OUTL1, OUTL2, OUTR1, OUTR2NSPMUTEL,NSPMUTER H ChselHPOUTL1, HPOUTL2, HPOUTR1, HPOUTR2 Power supply and GNDInit TEST1, TEST2Init Scdt Scshift Sclatch Power sequences System power-on sequencingNSLMT1,2 Serial ControlMantissa Data decimal value 128 Characteristics of Soft Mute function MODE2 MODE1IFMT0 IFMT1 IBIT0Rev.1.00 System2 Mode Rev.1.00 AC Characteristics Timing Chart AC CharacteristicsApplication Example DSP MCUPackage DiagramM65881AFP