National Instruments DAQ S manuals

173 pages2.58 Mb

3Important Information
- Warranty
- Copyright
- Trademarks
- Patents
- WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS
4Compliance
- Compliance with FCC/Canada Radio Frequency Interference Regulations
  - Determining FCC Class
  - FCC/DOC Warnings
  - Class A
    - Federal Communications Commission
    - Canadian Department of Communications
  - Compliance with EU Directives
5Contents
- 6Chapter 5 Analog Output
- 7Chapter 6 Digital I/O
- Chapter 7 Counters
- 9Chapter 8 Programmable Function Interfaces (PFI)
- Chapter 9 Digital Routing and Clock Generation
11About This Manual
- Conventions
- 12Related Documentation
  - NI-DAQmx for Windows
  - LabVIEW
  - 13LabWindows/CVI
  - Measurement Studio
  - 14ANSI C without NI Application Software
  - .NET Languages without NI Application Software
  - 15Device Documentation and Specifications
  - Training Courses
  - Technical Support on the Web
16Getting Started
- Installing NI-DAQmx
- Installing Other Software
- 17Installing the Hardware
- Device Self-Calibration
19DAQ System Overview
- 20DAQ Hardware
  - 21DAQ-STC2
- 22Calibration Circuitry
  - Internal or Self-Calibration
  - External Calibration
- 23Signal Conditioning
- Sensors and Transducers
- 24Programming Devices in Software
25I/O Connector
- NI 6124 I/O Connector Signal Descriptions
- 26NI 6154 I/O Connector Signal Descriptions
  - (NI 6154 Only) Table3 -2 describes the signals found on the NI 6154 I/O
  - connector. For more information about these signals, refer to the NI 6154 Specifications.
    - Table 3-2. NI 6154 I/O Connector Signal Descriptions
    - Table 3-1. NI 6124 Device Signal Descriptions (Continued)
- 27+5 V Power Source
28Analog Input
- Figure 4-2. Isolated S Series Analog Input Block Diagram
- Figure 4-1. Non-Isolated S Series Analog Input Block Diagram
- 29Analog Input Terminal Configuration
- 30Input Polarity and Range
- 31Working Voltage Range
- AI Data Acquisition Methods
- 33Analog Input Triggering
- Connecting Analog Input Signals
  - 34Types of Signal Sources
  - Differential Connections for Ground-Referenced Signal Sources
    - 35Figure 4-3. Differential Connection for Ground-Referenced Signals on Non-Isolated Devices
    - Figure 4-4. Differential Connection for Ground-Referenced Signals on Isolated Devices
  - 36Common-Mode Signal Rejection Considerations
  - Differential Connections for Non-Referenced or Floating Signal Sources
  - 37DC-Coupled
  - 38AC-Coupled
  - Field Wiring Considerations
  - 39Minimizing Drift in Differential Mode
- 40Analog Input Timing Signals
  - 41AI Sample Clock Signal
  - 42Routing AI Sample Clock Signal to an Output
  - Other Timing Requirements
  - 43AI Sample Clock Timebase Signal
  - AI Convert Clock Signal
  - 44Routing AI Convert Clock Signal to an Output
  - AI Convert Clock Timebase Signal
  - 45AI Hold Complete Event Signal
  - AI Start Trigger Signal
  - 46Routing AI Start Trigger to an Output Terminal
  - AI Reference Trigger Signal
  - 47Routing AI Reference Trigger Signal to an Output
- 48Getting Started with AI Applications in Software
49Analog Output
- 50Minimizing Glitches on the Output Signal
- AO Data Generation Methods
- 52Analog Output Triggering
- Connecting Analog Output Signals
  - 53Figure 5-3 shows how AO 0 and AO 1 are wired on a non-isolated S Series device.
    - Figure 5-3. Analog Output Connections for Non-Isolated S Series Devices
    - Figure 5-4. Analog Output Connections for Isolated S Series Devices
  - Figure 5-4 shows how AO 0 is wired on an isolated S Series device.
- 54Waveform Generation Timing Signals
  - AO Sample Clock Signal
  - 55Routing AO Sample Clock Signal to an Output
  - Other Timing Requirements
  - 56AO Sample Clock Timebase Signal
  - 57AO Start Trigger Signal
  - 58Routing AO Start Trigger Signal to an Output
  - AO Pause Trigger Signal
- 59Getting Started with AO Applications in Software
60Digital I/O
- Digital I/O for Non-Isolated Devices
  - 61Static DIO for Non-Isolated Devices
  - 62Digital Waveform Triggering for Non-Isolated Devices
  - Digital Waveform Acquisition for Non-Isolated Devices
  - 63DI Sample Clock Signal
    - Using an Internal Source
    - Using an External Source
    - Routing DI Sample Clock to an Output Terminal
  - 64Digital Waveform Generation for Non-Isolated Devices
  - DO Sample Clock Signal
    - 65Using an Internal Source
    - Using an External Source
    - Routing DO Sample Clock to an Output Terminal
  - 66I/O Protection for Non-Isolated Devices
  - Programmable Power-Up States for Non-Isolated Devices
  - 67DI Change Detection for Non-Isolated Devices
  - 68DI Change Detection Applications for Non-Isolated Devices
  - Connecting Digital I/O Signals on Non-Isolated Devices
  - 69Getting Started with DIO Applications in Software on Non-Isolated Devices
- 70Digital I/O for Isolated Devices
  - Static DIO for Isolated Devices
  - 71I/O Protection for Isolated Devices
  - Connecting Digital I/O Signals on Isolated Devices
  - 72Getting Started with DIO Applications in Software on Isolated Devices
73Counters
- Figure 7-1. SSeries Counters
- 74Counter Input Applications
  - Counting Edges
  - Single Point (On-Demand) Edge Counting
  - 75Buffered (Sample Clock) Edge Counting
  - 76Controlling the Direction of Counting
  - Pulse-Width Measurement
  - Single Pulse-Width Measurement
  - 77Buffered Pulse-Width Measurement
  - 78Period Measurement
  - Single Period Measurement
  - 79Buffered Period Measurement
  - Semi-Period Measurement
  - 80Single Semi-Period Measurement
  - Buffered Semi-Period Measurement
  - 81Frequency Measurement
  - 84Choosing a Method for Measuring Frequency
  - 86Position Measurement
  - Measurements Using Quadrature Encoders
    - 87Channel Z Behavior
  - 88Measurements Using Two Pulse Encoders
  - 89Buffered (Sample Clock) Position Measurement
  - Two-Signal Edge-Separation Measurement
  - 90Single Two-Signal Edge-Separation Measurement
  - Buffered Two-Signal Edge-Separation Measurement
- 91Counter Output Applications
  - Simple Pulse Generation Single Pulse Generation
  - 92Single Pulse Generation with Start Trigger
  - Retriggerable Single Pulse Generation
  - 93Pulse Train Generation Continuous Pulse Train Generation
  - 94Finite Pulse Train Generation
  - 95Frequency Generation
  - Using the Frequency Generator
  - 96Frequency Division
  - Pulse Generation for ETS
- 97Counter Timing Signals
  - 98Counter n Source Signal
  - Routing a Signal to Counter n Source
  - 99Routing Counter n Source to an Output Terminal
  - Counter n Gate Signal
  - Routing a Signal to Counter n Gate
  - Routing Counter n Gate to an Output Terminal
  - 100Counter n Aux Signal
  - Routing a Signal to Counter n Aux
  - Counter n A, Counter n B, and Counter n Z Signals
  - Routing Signals to A, B, and Z Counter Inputs
  - Routing Counter n Z Signal to an Output Terminal
  - 101Counter n Up_Down Signal
  - Counter n HW Arm Signal
  - Routing Signals to Counter n HW Arm Input
  - Counter n Internal Output and Counter n TC Signals
  - Routing Counter n Internal Output to an Output
  - Frequency Output Signal
  - Routing Frequency Output to a Terminal
- 102Default Counter/Timer Pinouts
- 103Counter Triggering
- 104Other Counter Features
  - Cascading Counters
  - Counter Filters
  - 105Prescaling
  - 106Duplicate Count Prevention
  - 107Example Application That Works Correctly (No Duplicate Counting)
  - 108Example Application That Works Incorrectly (Duplicate Counting)
  - Example Application That Prevents Duplicate Count
  - 109When To Use Duplicate Count Prevention
  - Enabling Duplicate Count Prevention in NI-DAQmx
  - Synchronization Modes
  - 11080 MHz Source Mode
  - 111Other Internal Source Mode
  - External Source Mode
112Programmable Function Interfaces (PFI)
- PFI for Non-Isolated Devices
- 113PFI for Isolated Devices
- 115Using PFI Terminals as Timing Input Signals
- Exporting Timing Output Signals Using PFI Terminals
- 116Using PFI Terminals as Static Digital Inputs and Outputs
- 117Connecting PFI Input Signals
- PFI Filters
- 119I/O Protection
- Programmable Power-Up States
121Digital Routing and Clock Generation
- Clock Routing
  - 12280 MHz Timebase
  - 20 MHz Timebase
  - 100 kHz Timebase
  - External Reference Clock
  - 10 MHz Reference Clock
- 123Synchronizing Multiple Devices
- 124Real-Time System Integration (RTSI)
  - RTSI Connector Pinout
  - 125Using RTSI as Outputs
  - 126Using RTSI Terminals as Timing Input Signals
  - RTSI Filters
- 128PXI Clock and Trigger Signals
  - PXI_CLK10
  - PXI Triggers
  - PXI_STAR Trigger
  - 129PXI_STAR Filters
- 130Routing Signals in Software
131Bus Interface
- MITE and DAQ-PnP
- PXI Considerations
  - PXI Clock and Trigger Signals
  - PXI Express
- 132Data Transfer Methods
  - Changing Data Transfer Methods between DMA and IRQ
133Triggering
- Triggering with a Digital Source
- 134Triggering with an Analog Source
  - Analog Input Channel
  - Analog Trigger Actions
- 135Analog Trigger Types
- 138Analog Trigger Accuracy
139A
- Device-Specific Information
  - NI 6124
    - NI 6124 Analog Output
      - NI 6124/6154 User Manual A-2 ni.com
      - Note The AO channels do not have analog or digital filtering hardware and do produce
      - images in the frequency domain related to the update rate.
        Figure A-1. NI 6124 Pinout
    - 140NI 6124 I/O Connector Pinout
      - Figure A-1 shows the pin assignments for the 68-pin connector on the NI6 124.
        NI 6124/6154 User Manual A-4 ni.com
    - 142NI 6124 Block Diagram
      - Figure A-2 shows the NI 6124 block diagram.
        ASIC
        ni.com.
        Figure A-2. NI 6124 Block Diagram
    - NI 6124 Cables and Accessories
      - Spartan-3A FPGA
      - I/O Connector PXI Express Connector
      - DAQ-6202 ASIC (Lightning Bug)
    - 143Using BNCs
    - Using Screw Terminals
    - Using SSR or ER Digital Signal Conditioning
    - Custom Cabling/Connectors Options
    - 144NI 6124 Specifications
  - 145NI 6154
    - NI 6154 Analog Output
    - 146NI 6154 I/O Connector Pinout
      - Figure A-3 shows the pin assignments for the 37-pin I/O connector on the NI 6154.
        Figure A-3. NI 6154 Pinout Table A-2. NI6154 Device Default NI-DAQmx Counter/Timer Pins
      - NI 6124/6154 User Manual A-10 ni.com
    - 148NI 6154 Block Diagram
      - PCI Connector
      - 37-Pin D-SUB Connector
      - Figure A-4 shows the NI 6154 block diagram.
        Figure A-4. NI 6154 Block Diagram
    - NI 6154 Cables and Accessories
      - ni.com.
    - Using Screw Terminals
      - DAQ- STC2
    - 149NI 6154 Isolation and Digital Isolators
    - 150Digital Isolation
      - Benefits of an Isolated DAQ Device
    - 151NI 6154 Specifications
152B
- Technical Support and Professional Services
- 154Glossary
  - Symbols
  - A
  - 155B
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  - 157D
  - 158E
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  - 159G
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  - 160M
  - N
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  - 161Q
  - R
  - 162S
  - T
  - 163V
- 165Index
  - Numerics
  - A
  - 166B
  - C
  - 167D
  - 168E
  - F
  - 169G
  - H
  - I
  - K
  - L
  - M
  - 170N
  - O
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  - 171Q
  - R
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  - 172T
  - 173U
  - W
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