Acer 2500 manual YUHINA3A Block Diagram

1Chapter

A

B

C

D

E

System

YUHINA3A Block Diagram

SYSTEM DC/DC

TPS51020DBT

38

INPUTS

OUTPUTS

5V_S5

5V_S3

Block

Project code: 91.40I01.001

DCBATOUT

5V_S0

3D3V_S5

CLK GEN.

4

Intel CPU

PCB P/N

: 48.40I01.0SA

3D3V_S3

4

3D3V_S0

ICS951402AGT 3

REVISION

: 03245-SA

SYSTEM DC/DC

Mobile P4

TPS5110

37

/Northwood

INPUTS

OUTPUTS

Diagram

/Prescott

4, 5

2D5V_S5

DCBATOUT

FSB

1D5V_S0

400/533/800MHz

CRT

APL5331

36

DDR*2

13

2D5V_S3

1D25V_S0

ATI

266/333/400MHz

TV OUT

RC300M

21

CPU DC/DC

11,12

LCD

MAX1546AETL

39,40

CM2843ACIM25

39

3

XGA/SXGA+

3

6,7,8,9,10

14

INPUTS

OUTPUTS

Micro-P

ALIK I/F

ATTINY12L-4SI

DCBATOUT

+VCC_CORE

66MHz

Realtek

42

1.3V

44A

10/100Mb

RJ45

RTL8100C

+VID

24

BAT CONN

Thermal &

26/A/4

23

1.2V

0.3A

43

2x FAN

PCI BUS

CARDBUS

MAXIM CHARGER

G768D

33MHz

CARDBUS

AD CONN

20

PCI 1520

PWR SW

MAX1909

GHK

TWO SLOT

43

41

TPS2224A

Line In

25/B/1

AC'97

26

27

27

INVERTER

INPUTS

OUTPUTS

Mic In

AC-Link

CODEC

14

31

ATI

BT+

ALC655

Power

18V

4.0A

2

30

IXP150

DCBATOUT

2

Button

UP+5V

35

5V

100mA

Mini-PCI

EMI

PCB LAYER

OP AMP

Line Out

45

G1421

802.11A/B/G

L1: Signal 1

31

31

21/B/2

25

L2: VCC/GND

LPC BUS 33MHz

USB

L3: Signal 2

16,17,18,19

2.0

L4: Signal 3

MODEM/BT

INT.SPKR

MDC Card

PIDE

NS SIO

KBC

LPC

LPC

L5: GND

USB

M38857

4MB

DEBUG

31

22

PC87392

L6: Signal 4

ATA100 SIDE

2.0

SST49LF040

CONN.

1

34

33

32

32

1

HDD

CD ROM

USB

Acer Inc.

8F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21

21

X 4 22

Taipei Hsien 221, Taiwan, R.O.C.

PS/2

Title

FDD

PRN

FIR

Touch

INT KB

BLOCK DIAGRAM

Debug

Port

Pad

Size

Document Number

Rev

con 33

Custom

YUHINA3

SA

21

29

28

33

33

Date:

Friday, December 05, 2003

Sheet 1

of

46

A

B

C

D

E

3