31
Checkpoint Code | Description |
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38 | Initializes different devices through DIM. |
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39 | Initializes |
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3A | Initialize RTC date/time. |
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3B | Test for total memory installed in the system. Also, |
| Check for DEL or ESC keys to limit memory test. Dis- |
| play total memory in the system. |
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3C | Mid POST initialization of chipset registers. |
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40 | Detect different devices (Parallel ports, serial ports, |
| and coprocessor in CPU, etc.) successfully installed in |
| the system and update the BDA, EBDA, etc. |
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50 | Programming the memory hole or any kind of imple- |
| mentation that needs an adjustment in system RAM |
| size if needed. |
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52 | Updates CMOS memory size from memory found in |
| memory test. Allocates memory for Extended BIOS |
| Data Area from base memory. |
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60 | Initializes |
| typematic rate. |
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75 | Initialize |
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78 | Initializes IPL devices controlled by BIOS and option |
| ROMs. |
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7A | Initializes remaining option ROMs. |
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7C | Generate and write contents of ESCD in NVRam. |
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84 | Log errors encountered during POST. |
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85 | Display errors to the user and gets the user response |
| for error. |
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87 | Execute BIOS setup if needed / requested. |
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8C | Late POST initialization of chipset registers. |
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