Advantech PCI-1718 Series user manual Fifo Status BASE+19H, Fifo Clear BASE+19H

C.18 FIFO Status — BASE+19H

The register at BASE+19H clears the FIFO buffer and sets its empty flag (EF). The FIFO status register, address BASE+19H, has flags which you can read to determine the current state of the FIFO buffer, including full flag, half-full flag, and empty flag.

Table C.19: Register for FIFO Status

Read	FIFO status
Bit #	7	6	5	4	3	2	1	0
BASE + 19H						FF	HF	EF

EF FIFO empty flag

1FIFO is empty

0FIFO is not empty

HF FIFO half-full flag

1FIFO is half-full or more than half-full

0 FIFO is less than half-full FF FIFO full flag

1FIFO is full

0FIFO is not full

C.19 FIFO Clear — BASE+19H

Writing any value to BASE+19H clears all data in the FIFO and sets the empty flag (EF) to 1.

Table C.20: Register for FIFO Clear

Write	FIFO clear
Bit #	7	6	5	4	3	2	1	0
BASE + 19H	X	X	X	X	X	X	X	X

PCI-1718 Series User Manual 76