State Analysis
Acquiring Data
This chapter explains how to configure the FS2010 to perform state analysis on the
The FS2010 State/Timing Adapter Probe interface does not require that a
Load the logic analyzer configuration file and configure the workspace for
Configure the trigger menu to acquire
The logic analyzer will flash “Slow or Missing Clock” if it does not see the
The logic analyzer will flash “Waiting in level 1” if the trigger specification has not been met.
If you are analyzing a 32 bit bus, load the configuration file for a 64 bit bus into a single analyzer card, the upper 64 bit labels will be truncated, but will work fine.
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