I INDEX

A

address enable switch (SW1.1), 2-6ADSP-BF533/37/61 processors

asynchronous memory bank, 1-3,1-4programmable flags, 1-3, 1-4,2-7

architecture, of USB-LAN EZ-Extender, 2-2

B

bill of materials, A-1block diagram, 2-2

board schematic (USB-LAN EZ-Extender),B-1

C

configuration, of USB-LAN EZ-Extender, 1-1connectors

J1-3 (expansion), 1-2

J2 (PHY devices), 1-6customer support, xi

D

dimensions, of USB-LAN EZ-Extender,-ix

E

Ethernet interface, viii, 1-4cable, 2-4

software documentation, 1-3expansion interface, viii, 1-2

F

flag pins, See programmable flags (PFs) flags enable switch (SW1.2), 2-7

I

interfaces, See Ethernet, USB, Poe, MII IOS switch (SW2.2-2.4), 2-9

IRQ line, 1-4, 2-7

J

J2 connector, 1-6jumpers

map of locations, 2-3JP1 (power), 2-4JP2 (LAN power), 2-5JP3 (link power), 2-5

L

LAN

devices, viii, 1-5, 2-8power jumper (JP2), 2-5

link jumper (JP3), 2-5

M

Media Access Control (MAC) address, 2-8Media Independent interface (MII)

(ADSP-BF537 processors), 1-6Midpan devices, 1-5

Blackfin USB-LAN EZ-Extender Manual

I-1

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Analog Devices 82-000845-01 manual Index, Lan