BIOS SPECIFICATION
6-5
USB1 Intel 0 29 1 8086h 27C9h 1043h 1297h
USB2 Intel 0 29 2 8086h 27CAh 1043h 1297h
USB3 Intel 0 29 3 8086h 27CBh 1043h 1297h
USB2.0 Intel 0 29 7 8086h 27CCh 1043h 1297h
PCI2PCI Bridge Intel 0 30 0 8086h 2448h 1043h 1297h
LPC Bridge Intel 0 31 0 8086h 27B9h 1043h 1297h
IDE Controller Intel 0 31 1 8086h 27DFh 1043h 1297h
SMBus Controller Intel 0 31 3 8086h 27Dah 1043h 1297h
PCIE(802.11) Intel 2 1 0 8086h 4222h 8086h 1000h
CardBus Controller Ricoh 3 1 0 1180h 0476h 1043h 1297h
1394 Ricoh 3 1 1 1180h 0552h 1043h 1297h
SD Ricoh 3 1 2 1180h 0822h 1043h 1297h
MS Ricoh 3 1 3 1180h 0592h 1043h 1297h
LAN Realtek 3 7 0 11ABh 4320h 1043h 11E5h
2.4 PANEL DETECTION AND INITIALIZATION
During POST, the VGA BIOS will automatically detect the LCD panel type through EDID and set
proper parameters for the LCD panel.
2.5 GPE EVENT
The GPE enable register and status register are located at offset 0x2C and 0x28 of PMIO range
respectively. The GPI0~GPI15 could be set to trigger SCI, SMI, or nothing by setting their
corresponding control bits in Dev#0/Func#0/Reg#B8h “GPI Routing Control Register” if being
selected as general purpose input.
T able 2-5 GPE event table
Event GPE
Bit Source None-ACPI ACPI Description
3 USB device W ake Up Wake Up USB Controller 1
4 USB device W ake Up Wake Up USB Controller 2
8 Ring In(PM_RI#) Wa ke Up Wake Up Modem ring/Cardbus ring
11 PCI_PME# Wake Up /
SMI Wake Up /
SCI PME# of PCI device
12 USB device W ake Up Wake Up USB Controller 3
13 ICH7-M internal device on bus
#0 Wa ke Up /
SMI Wake Up /
SCI PME# of int ernal dev ice on bu s 0
14 USB device W ake Up Wake Up USB Controller 4
24 EXTSMI# SMI SMI External SMI from KBC ITE8510
28 KB_SCI# N/A SCI SCI# from KBC ITE8510