Connect Tech Inc. FreeForm/Express S6 - PCIe
Function | Hot Swap |
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| When the is being configured, FPGA I/Os will be pulled |
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| high with weak internal |
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Location | J2 |
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Type | 1x2 0.100” jumper block |
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Pinout |
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| Position |
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| Description |
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| I/Os have pullups |
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| off |
| I/Os are floating |
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Default | Floating |
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Function |
| FMC JTAG Bypass |
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| Selects either whether or not to include the FMC module |
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| in the JTA chain |
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Location |
| J3 |
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Type |
| 2x2 0.100” jumper block |
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Pinout |
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| Position |
| Description |
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| TDI to FMC |
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| TDO from FMC |
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| Bypass |
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| off |
| Not applicable |
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Default |
| Bypass |
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Ethernet
Description
Two 10/100/1000 Ethernet ports are connected to the FPGA, via two separate RGMII capable Ethernet physical layer devices (PHYs). The FPGA logic resources are used to implement the Ethernet media access controller (MAC).
Connector & LEDs
Function | Ethernet |
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Location | P6A, P6B |
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Type | 2x5 2mm header |
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| MLE |
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Revision 0.01 | 13 |