
HARDWARE
| 
 | Table  | 
| 
 | 
 | 
| LED | TESTS | 
| 
 | 
 | 
| ACT | TLBs set. External bus controller set | 
| 
 | 
 | 
| ST0 | PCB arbitration priorities set | 
| 
 | 
 | 
| ST1 | Interrupt controller set | 
| 
 | 
 | 
| IOP | UART set | 
| 
 | 
 | 
| ACT, ST0 | System reset check done. | 
| 
 | 
 | 
| ACT, ST1 | I2C bus set. (first pass) | 
| 
 | 
 | 
| ACT, IOP | Board configuration initialized | 
| 
 | 
 | 
| ST0, ST1 | Board strapping validated | 
| 
 | 
 | 
| ST0, IOP | I2C bus set. (second pass) | 
| 
 | 
 | 
| ST1, IP | SDRAM initialized | 
| 
 | 
 | 
| ACT, ST0, ST1 | SDRAM checked and cleared. | 
| 
 | 
 | 
| None | Breeze entry | 
| 
 | 
 | 
2.8.4Geographic Addressing
CompactPCI backplanes that support 
Figure 2-3.  Geographic Addressing Register, E800 0001h
GA0
GA1
GA2
GA3
GA4
READ Only
(1)+5V
(0)GND
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 
| 
 | Revision 1.0, January 2006 | 
