CY62146ESL MoBL→
Switching Characteristics
Over the Operating Range [9]
Parameter
Read Cycle
Description
45 ns
Min | Max |
|
|
Unit
tRC |
| Read Cycle Time | 45 |
| ns | ||||||
tAA |
| Address to Data Valid |
| 45 | ns | ||||||
tOHA |
| Data Hold from Address Change | 10 |
| ns | ||||||
tACE |
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| LOW to Data Valid |
| 45 | ns | |||
CE | |||||||||||
tDOE |
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| LOW to Data Valid |
| 22 | ns | |||
OE | |||||||||||
tLZOE |
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|
| LOW to | 5 |
| ns | |||
OE | |||||||||||
tHZOE |
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|
| HIGH to |
| 18 | ns | |||
OE | |||||||||||
tLZCE |
|
|
| LOW to | 10 |
| ns | ||||
CE | |||||||||||
tHZCE |
|
|
| HIGH to |
| 18 | ns | ||||
CE | |||||||||||
tPU |
|
|
| LOW to Power Up | 0 |
| ns | ||||
CE | |||||||||||
tPD |
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| HIGH to Power Down |
| 45 | ns | ||||
CE | |||||||||||
tDBE |
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| 22 | ns |
BLE/BHE LOW to Data Valid | |||||||||||
tLZBE |
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| 5 |
| ns |
BLE/BHE LOW to | |||||||||||
tHZBE |
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| 18 | ns |
BLE/BHE HIGH to | |||||||||||
Write Cycle[12] |
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tWC |
| Write Cycle Time | 45 |
| ns | ||||||
tSCE |
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| LOW to Write End | 35 |
| ns | ||||
CE | |||||||||||
tAW |
| Address Setup to Write End | 35 |
| ns | ||||||
tHA |
| Address Hold from Write End | 0 |
| ns | ||||||
tSA |
| Address Setup to Write Start | 0 |
| ns | ||||||
tPWE |
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|
|
| Pulse Width | 35 |
| ns | |||
WE | |||||||||||
tBW |
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| 35 |
| ns |
BLE/BHE LOW to Write End | |||||||||||
tSD |
| Data Setup to Write End | 25 |
| ns | ||||||
tHD |
| Data Hold from Write End | 0 |
| ns | ||||||
tHZWE |
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|
|
| LOW to |
| 18 | ns | |||
WE | |||||||||||
tLZWE |
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|
| HIGH to | 10 |
| ns | |||
WE |
Notes
9.Test conditions for all parameters other than
10.At any temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device.
11.tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a
12.The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE, BLE or both = VIL. All signals must be active to initiate a write and any of these signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
Document #: | Page 6 of 12 |
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