Cypress CY62146ESL

CY62146ESL MoBL®

Document #: 001-43142 Rev. ** Page 11 of 12

Package Diagrams

Figure 8. 44-Pin TSOP II, 51-85087

51-85087-*A

[+] Feedback [+] Feedback

Contents

Main CY62146ESL MoBL 4-Mbit (256K x 16) Static RAM Features Functional Description Logic Block Diagram CY62146ESL MoBL Document #: 001-43142 Rev. ** Page 2 of 12 Pin Configuration Figure 1. 44-Pin TSOP II (Top View) Product Portfolio Maximum Ratings Operating Range Electrical Characteristics CY62146ESL MoBL Capacitance Thermal Resistance AC Test Loads and Waveforms Data Retention Characteristics Data Retention Waveform CY62146ESL MoBL Switching Characteristics Switching Waveforms Figure 2. Read Cycle No.1: Address Transition Controlled. [13, 14] Figure 3. Read Cycle No. 2: OE Controlled [14, 15] Figure 4. Write Cycle No 1: WE Controlled [12, 16, 17] Figure 5. Write Cycle 2: CE Controlled [12, 16, 17] Switching Waveforms Figure 6. Write Cycle 3: WE controlled, OE LOW [17] Figure 7. Write Cycle 4: BHE/BLE Controlled, OE LOW [17] Switching Waveforms Truth Table Ordering Information Page Document History Page