CY62157EV30 MoBL®
Maximum Ratings
Exceeding maximum ratings may shorten the battery life of the device. User guidelines are not tested.
Storage Temperature | ||||
Ambient Temperature with |
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Power Applied | ||||
Supply Voltage to Ground |
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Potential | (VCCmax + 0.3V) | |||
DC Voltage Applied to Outputs |
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in | (V | CCmax | + 0.3V) | |
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DC Input Voltage [6, 7] |
| + 0.3V) | ||||
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| CC max |
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Output Current into Outputs (LOW) |
| 20 mA | ||||
Static Discharge Voltage |
| > 2001V | ||||
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Latch up Current |
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| > 200 mA | ||
Operating Range |
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Device | Range |
| Ambient | VCC | [8] | |
| Temperature |
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CY62157EV30LL | 2.20V to | |||||
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| 3.60V |
Electrical Characteristics
Over the Operating Range
Parameter | Description |
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| Test Conditions | 45 ns | Unit | |||||
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| Min | Typ [2] | Max | |||||||
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VOH | Output HIGH Voltage | IOH = |
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| 2.0 |
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| V | ||
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| IOH = | 2.4 |
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| V | ||||
VOL | Output LOW Voltage | IOL = 0.1 mA |
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| 0.4 | V | ||
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| IOL = 2.1mA, VCC > 2.70V |
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| 0.4 | V | ||||
VIH | Input HIGH Voltage |
| VCC = 2.2V to 2.7V |
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| 1.8 |
| VCC + 0.3 | V | |
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| VCC = 2.7V to 3.6V |
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| 2.2 |
| VCC + 0.3 | V | |
VIL | Input LOW Voltage |
| VCC = 2.2V to 2.7V |
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| 0.6 | V | ||
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| VCC = 2.7V to 3.6V |
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| 0.8 | V | ||
IIX | Input Leakage Current | GND < VI < VCC |
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| +1 | ∝A | |||
IOZ | Output Leakage Current | GND < VO < VCC, Output Disabled |
| +1 | ∝A | ||||||
ICC | VCC Operating Supply Current | f = fmax = 1/tRC | VCC = VCCmax |
| 18 | 25 | mA | ||||
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| f = 1 MHz | IOUT = 0 mA |
| 1.8 | 3 | ||||
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| CMOS levels |
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ISB1 | Automatic CE Power Down |
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| 1 > VCC − 0.2V, CE2 < 0.2V |
| 2 | 8 | ∝A | |||
| CE |
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| Current — CMOS Inputs |
| VIN > VCC – 0.2V, VIN < 0.2V) |
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| f = fmax (Address and Data Only), |
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| f = 0 (OE, BHE, BLE and |
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| WE), VCC = 3.60V |
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ISB2 [9] | Automatic CE Power Down |
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| 1 > VCC – 0.2V or CE2 < 0.2V, |
| 2 | 8 | ∝A | |||
| CE |
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| Current — CMOS Inputs |
| VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 3.60V |
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Capacitance [10]
Parameter | Description | Test Conditions | Max | Unit | |
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CIN | Input Capacitance | TA = 25°C, f = 1 MHz, | 10 | pF | |
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| VCC = VCC(typ) |
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COUT | Output Capacitance | 10 | pF | ||
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Notes
6.VIL(min) =
7.VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
8.Full device AC operation assumes a 100 ∝s ramp time from 0 to Vcc(min) and 200 ∝s wait time after VCC stabilization.
9.Only chip enables (CE1 and CE2), byte enables (BHE and BLE) and BYTE (48 TSOP I only) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
10.Tested initially and after any design or process changes that may affect these parameters.
Document #: | Page 4 of 14 |
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